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MX29F400BTI-55 PDF预览

MX29F400BTI-55

更新时间: 2024-11-29 20:40:31
品牌 Logo 应用领域
旺宏电子 - Macronix 光电二极管内存集成电路
页数 文件大小 规格书
45页 722K
描述
Flash, 256KX16, 55ns, PDSO48, 12 X 20 MM, PLASTIC, TSOP1-48

MX29F400BTI-55 数据手册

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MX29F400T/B  
4M-BIT[512Kx8/256Kx16]CMOSFLASHMEMORY  
FEATURES  
• 524,288 x 8/262,144 x 16 switchable  
• Singlepowersupplyoperation  
erase cycle completion.  
• Ready/Busy pin (RY/BY)  
- 5.0V only operation for read, erase and program  
operation  
-Providesahardwaremethodofdetectingprogramor  
erase cycle completion.  
• Fast access time: 55/70/90/120ns  
• Lowpowerconsumption  
- Sector protect/unprotect for 5V only system or 5V/  
12V system.  
- 40mA maximum active current(5MHz)  
- 1uA typical standby current  
• Commandregisterarchitecture  
- Byte/word Programming (7us/12us typical)  
- Sector Erase (Sector structure 16K-Bytex1, 8K-  
Bytex2, 32K-Bytex1, and 64K-Byte x7)  
• Auto Erase (chip & sector) and Auto Program  
-Automaticallyeraseanycombinationofsectorswith  
Erase Suspend capability.  
• Sectorprotection  
- Hardware method to disable any combination of  
sectors from program or erase operations  
• 100,000minimumerase/programcycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Code Sector Architecture  
- T = Top Boot Sector  
- B = Bottom Boot Sector  
• Low VCC write inhibit is equal to or less than 3.2V  
• Package type:  
- Automatically program and verify data at specified  
address  
- 44-pin SOP  
• Erasesuspend/EraseResume  
- 48-pin TSOP  
- Suspends an erase operation to read data from, or  
program data to, another sector that is not being  
erased, then resumes the erase.  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
• Status Reply  
• 20 years data retention  
-Datapolling&Togglebitfordetectionofprogramand  
GENERAL DESCRIPTION  
The MX29F400T/B is a 4-mega bit Flash memory orga-  
nized as 512K bytes of 8 bits or 256K words of 16 bits.  
MXIC's Flash memories offer the most cost-effective  
and reliable read/write non-volatile random access  
memory. The MX29F400T/B is packaged in 44-pin SOP,  
48-pin TSOP. It is designed to be reprogrammed and  
erased in system or in standard EPROM programmers.  
TTL level control inputs and fixed power supply levels  
during erase and programming, while maintaining maxi-  
mum EPROM compatibility.  
MXIC Flash technology reliably stores memory contents  
even after 100,000 erase and program cycles. The MXIC  
cell is designed to optimize the erase and programming  
mechanisms. In addition, the combination of advanced  
tunnel oxide processing and low internal electric fields  
for erase and program operations produces reliable cy-  
cling. The MX29F400T/B uses a 5.0V±10% VCC sup-  
ply to perform the High Reliability Erase and auto Pro-  
gram/Erase algorithms.  
The standard MX29F400T/B offers access time as fast  
as 55ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the MX29F400T/B has separate chip enable (CE) and  
output enable (OE) controls.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29F400T/B uses a command register to manage this  
functionality. The command register allows for 100%  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up pro-  
tection is proved for stresses up to 100 milliamps on  
address and data pin from -1V to VCC + 1V.  
P/N:PM0439  
REV. 1.9 , APR. 03, 2002  
1

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