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MX0141VA0AVG8 PDF预览

MX0141VA0AVG8

更新时间: 2024-09-17 01:11:03
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
6页 205K
描述
1:4 High-Speed / Low-Speed Multiplexer Pair

MX0141VA0AVG8 数据手册

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1:4 High-Speed / Low-Speed  
Multiplexer Pair  
MX0141VA0  
Short-Form Datasheet  
Description  
Important: All parameters in this short-form datasheet are prior to  
device characterization and are currently subject to change. Final  
parameters will be updated after device characterization.  
Common High/Low MUX  
.
.
.
.
1:4 mux (separate high-speed and low-speed groups)  
SSTL18 and SSTL12 signaling through mux  
Mux RON = 8at 0.9V condition  
Pinout allows easy routing when two of these parts are placed  
directly over each other on the top and bottom of the circuit  
board  
The MX0141VA0 is comprised of a high-speed, 1:4 multiplexer  
(mux) path and a low-speed, 1:4 mux path.  
.
.
Break before makeswitching  
The high-speed path is a bidirectional 12-bit port 1:4 mux. The low-  
speed path is a unidirectional 4-bit port 1:4 mux. Both high-speed  
and low-speed paths support SSTL_12 and SSTL_18 signaling.  
4 x 7.5 mm 98-FCCSP package with 0.5mm ball pitch  
Both paths are controlled in an identical manner using the input  
control signals: SEL1, SEL0, and EN_B. For example, when EN_B  
is asserted LOW, one of the high-speed [ABCD] ports is connected  
to IN while all the remaining ports are tri-stated. When input EN_B  
is HIGH all four [ABCD] ports are tri-stated.  
High-Speed MUX Features  
.
.
.
.
.
.
.
533MT/s  
12-bit bus width, each port  
Bidirectional ports  
Tri-state for deselected ports  
Pin-to-pin output skew < 50ps  
Propagation delay < 100ps  
Insertion loss < 2dB  
Figure 1. Block Diagram  
A[11:0]  
B[11:0]  
C[11:0]  
D[11:0]  
High  
Speed  
IN[11:0]  
INL[3:0]  
Low-Speed MUX Features  
.
.
.
.
50MT/s  
4-bit bus width, each port  
Unidirectional ports  
LA[3:0]  
LB[3:0]  
LC[3:0]  
LD[3:0]  
Low  
Speed  
Either tri-state or weak pull-up for deselected ports as  
selected via the FUNC pin  
SEL[1:0]  
EN_B  
FUNC  
Z or H  
Table 1.  
Feature  
Characteristics of HS and LS Paths  
HS Path  
533MT/s  
LS Path  
Port speed  
Port size  
Direction  
50MT/s  
4-bit  
Typical Applications  
12-bit  
.
SATA drive memory expansion for both ONFI3 and  
TOGGLE2 Flash medium  
Bidirectional  
Unidirectional  
.
General purpose 1:4 multiplexing logic for compact,  
low-power product solutions  
IN A, B, C, or D INL LA, LB, LC, or LD  
Control pins SEL[1:0], EN_B SEL[1:0], EN_B, FUNC  
© 2017 Integrated Device Technology, Inc.  
1
May 1, 2017  

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