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MTP60N10E7L PDF预览

MTP60N10E7L

更新时间: 2024-11-25 19:35:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 局域网开关脉冲晶体管
页数 文件大小 规格书
8页 177K
描述
60A, 100V, 0.024ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, TO-220AB, 3 PIN

MTP60N10E7L 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TO-220AB包装说明:FLANGE MOUNT, R-PSFM-T3
针数:3Reach Compliance Code:unknown
风险等级:5.83其他特性:LOGIC LEVEL COMPATIBLE
雪崩能效等级(Eas):540 mJ外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:100 V
最大漏极电流 (Abs) (ID):60 A最大漏极电流 (ID):60 A
最大漏源导通电阻:0.024 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:TO-220ABJESD-30 代码:R-PSFM-T3
JESD-609代码:e0元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:175 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):242 W最大脉冲漏极电流 (IDM):210 A
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

MTP60N10E7L 数据手册

 浏览型号MTP60N10E7L的Datasheet PDF文件第2页浏览型号MTP60N10E7L的Datasheet PDF文件第3页浏览型号MTP60N10E7L的Datasheet PDF文件第4页浏览型号MTP60N10E7L的Datasheet PDF文件第5页浏览型号MTP60N10E7L的Datasheet PDF文件第6页浏览型号MTP60N10E7L的Datasheet PDF文件第7页 
Order this document  
by MTP60N10E7L/D  
SEMICONDUCTOR TECHNICAL DATA  
N–Channel Enhancement–Mode Silicon Gate  
TMOS POWER FET  
This advanced TMOS E–FET is designed to withstand high  
energy in the avalanche and commutation modes. The new energy  
efficient design also offers a drain–to–source diode with a fast  
recovery time. Designed for medium voltage, high speed switching  
applications in power supplies, converters and PWM motor  
controls. These devices are particularly well suited for bridge  
circuits where diode speed and commutating safe operating areas  
are critical and offer additional safety margin against unexpected  
voltage transients.  
60 AMPERES  
100 VOLTS  
R
= 0.022  
DS(on)  
New Features of TMOS 7  
N–Channel  
Ultra Low On–Resistance Provides Higher Efficiency  
Reduced Gate Charge  
D
Features Common to TMOS 7 and TMOS E–FETS  
Logic Level Gate Drive  
Avalanche Energy Specified  
Diode Characterized for Use in Bridge Circuits  
G
I
and V  
Specified at Elevated Temperature  
DSS  
DS(on)  
S
CASE 221A–09, Style 5  
TO–220AB  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
100  
Unit  
Drain–to–Source Voltage  
V
DSS  
Vdc  
Vdc  
Drain–to–Gate Voltage (R  
= 1.0 M)  
V
DGR  
100  
GS  
Gate–to–Source Voltage — Continuous  
Gate–to–Source Voltage — Non–Repetitive (t 10 ms)  
V
± 20  
± 25  
Vdc  
Vpk  
GS  
V
GSM  
p
Drain Current — Continuous  
Drain Current — Continuous @ 100°C  
Drain Current — Single Pulse (t 10 µs)  
I
I
60  
48  
210  
Adc  
Apk  
D
D
I
p
DM  
Total Power Dissipation  
Derate above 25°C  
P
D
242  
1.61  
Watts  
W/°C  
Operating and Storage Temperature Range  
T , T  
J stg  
55 to 175  
°C  
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C  
E
AS  
mJ  
J
540  
(V  
DD  
= 60 Vdc, V  
= 5.0 Vdc, PEAK I = 60 Apk, L = 0.3 mH, R = 25  
)
GS  
L
G
Thermal Resistance — Junction to Case  
Thermal Resistance — Junction to Ambient  
R
R
0.62  
62.5  
°C/W  
°C  
θJC  
θJA  
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds  
T
260  
L
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Motorola, Inc. 1999  

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