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MTB60N05HDL PDF预览

MTB60N05HDL

更新时间: 2024-11-26 19:57:07
品牌 Logo 应用领域
安森美 - ONSEMI 开关脉冲晶体管
页数 文件大小 规格书
12页 120K
描述
60A, 50V, 0.014ohm, N-CHANNEL, Si, POWER, MOSFET, D2PAK-3

MTB60N05HDL 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:D2PAK-3针数:3
Reach Compliance Code:not_compliantECCN代码:EAR99
Factory Lead Time:1 week风险等级:5.17
雪崩能效等级(Eas):540 mJ外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:50 V
最大漏极电流 (Abs) (ID):60 A最大漏极电流 (ID):60 A
最大漏源导通电阻:0.014 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PSSO-G2JESD-609代码:e0
元件数量:1端子数量:2
工作模式:ENHANCEMENT MODE最高工作温度:175 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):150 W
最大脉冲漏极电流 (IDM):180 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

MTB60N05HDL 数据手册

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MTB60N05HDL  
Preferred Device  
Power MOSFET  
60 Amps, 50 Volts, Logic Level  
2
N–Channel D PAK  
2
The D PAK package has the capability of housing a larger die than  
http://onsemi.com  
any existing surface mount package which allows it to be used in  
applications that require the use of surface mount components with  
higher power and lower R  
capabilities. This advanced high–cell  
DS(on)  
60 AMPERES  
50 VOLTS  
density HDTMOS power FET is designed to withstand high energy in  
the avalanche and commutation modes. This new energy efficient  
design also offers a drain–to–source diode with a fast recovery time.  
Designed for low voltage, high speed switching applications in power  
supplies, converters and PWM motor controls, these devices are  
particularly well suited for bridge circuits where diode speed and  
commutating safe operating areas are critical and offer additional  
safety margin against unexpected voltage transients.  
R
= 14 m  
DS(on)  
N–Channel  
D
Avalanche Energy Specified  
Source–to–Drain Diode Recovery Time Comparable to a  
Discrete Fast Recovery Diode  
G
Diode is Characterized for Use in Bridge Circuits  
S
I  
and V Specified at Elevated Temperature  
DS(on)  
DSS  
Short Heatsink Tab Manufactured – Not Sheared  
4
Specially Designed Leadframe for Maximum Power Dissipation  
2
D PAK  
CASE 418B  
STYLE 2  
2
3
1
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Drain–to–Source Voltage  
Drain–to–Gate Voltage (R  
Symbol  
Value  
50  
Unit  
Vdc  
Vdc  
MARKING DIAGRAM  
& PIN ASSIGNMENT  
V
DSS  
= 1.0 M)  
V
V
50  
GS  
DGR  
4
Gate–to–Source Voltage  
– Continuous  
Drain  
V
± 15  
± 20  
Vdc  
Vpk  
GS  
– Non–Repetitive (t 10 ms)  
p
GSM  
Drain Current – Continuous  
Drain Current – Continuous @ 100°C  
I
I
60  
42  
180  
Adc  
Apk  
D
D
T60N05HDL  
YWW  
Drain Current – Single Pulse (t 10 µs)  
I
p
DM  
Total Power Dissipation  
Derate above 25°C  
P
D
150  
1.0  
Watts  
W/°C  
1
Gate  
2
3
Operating and Storage Temperature Range  
Single Pulse Drain–to–Source Avalanche  
T , T  
stg  
– 55 to  
175  
°C  
J
Drain  
Source  
T60N05HDL  
= Device Code  
= Year  
= Work Week  
E
AS  
540  
mJ  
Y
WW  
Energy – Starting T = 25°C  
J
(V  
= 25 Vdc, V  
= 10 Vdc, Peak  
DD  
GS  
= 60 Apk, L = 0.3 mH, R = 25 Ω)  
I
L
G
ORDERING INFORMATION  
Thermal Resistance – Junction to Case  
Thermal Resistance – Junction to Ambient  
R
θJC  
R
θJA  
1.0  
62.5  
°C/W  
°C  
Device  
Package  
Shipping  
50 Units/Rail  
Maximum Lead Temperature for Soldering  
Purposes, 1/8from Case for 5 seconds  
T
L
260  
2
D PAK  
MTB60N05HD  
MTB60N05HDT4  
2
D PAK  
800/Tape & Reel  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
November, 2000 – Rev.2  
MTB60N05HDL/D  

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