MT92220
1023 Channel Voice Over IP/AAL2
Processor
Data Sheet
May 2007
Features
•
1023 full-duplex PCM or ADPCM voice channels
Ordering Information
over IP/UDP/RTP connections or over AAL2 VCs
MT92220BG
608 EPBGA Trays, Bake & Drypack
MT92220BG2 608 EPBGA* Trays, Bake & Drypack
*Pb Free Tin/Silver/Copper
•
Simultaneously support of IP/UDP connection
and AAL2 VC
•
•
•
•
RTP packaging optional in IP/UDP connection
Supports IP version 4 and version 6
-40°C to +85°C
Supports IP over Ethernet, ATM (AAL5) or POS
•
Support trunking in RTP and AAL2; up to 255
PCM/ADPCM channels per RTP connection or
AAL2 CID
Support maximum 1500 bytes packet size
Up to 4096 bytes of jitter buffer, absorbing +/- 256
Support Ethernet II, IEEE 802.3, LLC/SNAP and
PPP frames
•
•
•
•
•
Supports Classical IP over ATM and LAN
Emulation (LANE) v1/v2
•
•
Supports MPLS, MPOA and IEEE 802.1p/Q
ms of PDV
ELAN-ID
•
•
Less than 250 usec of latency
Packages voice in AAL2 according to I.363.2 and
I.366.2
Injection of CPU-generated RTP or AAL2 CPS-
packets
H.110 compliant TDM bus carrying PCM,
•
Reception of CPU-destinated RTP or AAL2 CPS-
packets
ADPCM or HDLC channels
HDLC channels can be used to carry UDP
payload or AAL2 CPS-packet generated by
external agent
•
•
Primary and secondary network interfaces
Primary network interface supports 10/100 MII,
POS-PHY or Utopia level 1/2
MT9043
MT9041
Intel/Motorola
CPU
(8K to16.384M PLL)
optional
MT92220
Message Channel
Signals
Second
Clock
uP
UTOPIA Port B
(PHY/SAR)
Network
Interface
Recovery
Interface
H100/
H110
H.110
H100
Interface
Primary
Network
Interface
MII, POS, or
UTOPIA (PHY/SAR)
interface
Service Timer
Compatibility Clocks
and Frame
Pad
SS
RTP/AAL2
Assembly
Packet
Identification
and Routing
RTP/AAL2
TDM
SS/Padding
Calculator
Disassembly
DataPath
Network
Memory
Controler
Dual Memory Controler
SDRAM
SSRAM
(256k x18*)
SSRAM
(512k x18*)
SSRAM
(4M x32*)
(256k x36*)
Memory Bank A Memory Bank B
Memory Bank C
*Typical RAM size for the support of 1023 channels. Parity bis are optionnal on all memories.
Figure 1 - MT92220 Block Diagram
1
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Copyright 2002-2007, Zarlink Semiconductor Inc. All Rights Reserved.