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MT9160AN1 PDF预览

MT9160AN1

更新时间: 2024-11-29 04:01:11
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 解码器编解码器
页数 文件大小 规格书
33页 529K
描述
3 Volt Multi-Featured Codec (MFC)

MT9160AN1 数据手册

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ISO2-CMOS  
MT91L60/61  
3 Volt Multi-Featured Codec (MFC)  
Data Sheet  
March 2006  
Features  
Single 2.7-3.6 volt supply operation  
Ordering Information  
MT91L61 version features a delayed framing  
pulse in SSI and ST-BUS modes to facilitate  
cascaded devices  
MT91L61AE  
MT91L60AE  
MT91L61AS  
MT91L60AS  
MT91L61AN  
MT91L60AN  
MT91L60ASR  
MT91L61ASR  
24 Pin PDIP  
24 Pin PDIP  
24 Pin SOIC  
20 Pin SOIC  
24 Pin SSOP  
20 Pin SSOP  
20 Pin SOIC  
24 Pin SOIC  
Tubes  
Tubes  
Tubes  
Tubes  
Tubes  
Tubes  
Tape & Reel  
Tape & Reel  
Tape & Reel  
Tubes  
Programmable µ-Law/A-Law Codec and Filters  
Programmable ITU-T (G.711)/sign-magnitude  
coding  
Programmable transmit, receive and side-tone  
gains  
MT91L61ASR1 24 Pin SOIC*  
MT9160AN1  
20 Pin SSOP*  
*Pb Free Matte Tin  
Fully differential interface to handset transducers  
- including 300 ohm receiver driver  
-40°C to +85°C  
Flexible digital interface including ST-BUS/SSI  
Serial microport  
Applications  
Low power operation  
Battery operated equipment  
ITU-T G.714 compliant  
Digital telephone sets  
Cellular radio sets  
Multiple power down modes  
Local area communications stations  
Pair Gain Systems  
Line cards  
VSSD  
VDD  
FILTER/CODEC GAIN  
M -  
ENCODER  
DECODER  
7dB  
VSSA  
M +  
-7dB  
Transducer  
Interface  
VBias  
VRef  
HSPKR +  
HSPKR -  
Din  
Dout  
Timing  
Flexible  
Digital  
Interface  
STB/F0i  
CLOCKin  
ST-BUS  
C & D  
Channels  
STBd/FOod  
Serial Microport  
A/µ/IRQ  
(MT91L61only)  
IC  
CS  
DATA1 DATA2 SCLK  
PWRST  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 1999-2006, Zarlink Semiconductor Inc. All Rights Reserved.  

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