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MT90866AG2 PDF预览

MT90866AG2

更新时间: 2024-02-02 14:08:32
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 开关电信集成电路电信转换电路电信电路
页数 文件大小 规格书
86页 695K
描述
Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch

MT90866AG2 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:BGA, BGA344,20X20,50Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.77
Is Samacsys:NJESD-30 代码:S-PBGA-B344
JESD-609代码:e1长度:27 mm
湿度敏感等级:3功能数量:1
端子数量:344最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA344,20X20,50
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):250电源:3.3,5 V
认证状态:Not Qualified座面最大高度:2.53 mm
子类别:Other Telecom ICs最大压摆率:0.48 mA
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:DIGITAL TIME SWITCH温度等级:INDUSTRIAL
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:27 mm
Base Number Matches:1

MT90866AG2 数据手册

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MT90866  
Flexible 4 K x 2.4 K Channel Digital Switch with  
H.110 Interface and 2.4 K x 2.4 K Local Switch  
Data Sheet  
September 2005  
Features  
2,432 x 2,432 non-blocking switching among local  
streams  
Ordering Information  
MT90866AG  
344 Ball PBGA  
Trays  
4,096 x 2,432 blocking switching between  
backplane and local streams  
MT90866AG2 344 Ball PBGA* Trays  
*Pb Free Tin/Silver/Copper  
2,048 x 2,048 non-blocking switching among  
backplane streams  
-40°C to +85°C  
Rate conversion between backplane and local  
streams  
Connection memory block-programming for fast  
device initialization  
Rate conversion among local streams  
Tristate-control outputs for external drivers  
Backplane interface accepts data rates of  
8.192 Mb/s or 16.384 Mb/s  
Pseudo-Random Binary Sequence (PRBS) pattern  
generation and testing for backplane and local  
streams  
Local interface accepts data rates of 2.048 Mb/s,  
4.096 Mb/s or 8.192 Mb/s  
Conforms to the mandatory requirements of the  
IEEE-1149.1 (JTAG) standard  
Sub-rate switching (2 or 4 bits) configuration for  
local streams at a data rate of 2.048 Mb/s  
3.3V operation with 5 V tolerant inputs and I/O’s  
5 V tolerant PCI driver on CT-Bus I/O’s  
Meets all the key H.110 mandatory signal  
requirements including timing  
Per-channel variable or constant throughput  
delay  
Applications  
Carrier-grade VoIP Gateways  
IP-PBX and PABX  
Per-stream input delay, programmable for local  
streams on a per bit basis  
Per-stream output advancement, programmable  
for backplane and local streams  
Integrated Access Devices  
Access Servers  
CTI Applications/CompactPCI® Platforms  
Per-channel direction control for backplane  
streams  
H.110, H.100, ST-BUS and proprietary Backplane  
Applications  
Per-channel message mode for backplane and  
local streams  
Per-channel high impedance output control for  
backplane and local streams  
Description  
The MT90866 Digital Switch provides switching  
capacities of 4,096 x 2,432 channels between  
backplane and local streams, 2,432 x 2,432 channels  
among local streams and 2,048 x 2,048 channels  
among backplane streams. The local connected serial  
inputs and outputs have 32, 64 and 128 64 kb/s  
channels per frame with data rates of 2.048, 4.096 and  
8.192 Mb/s respectively. The backplane connected  
serial inputs and outputs have 128 and 256 64 kb/s  
channels per frame with data rates of 8.192 and  
16.384 Mb/s respectively.  
Compatible to Stratum 4 Enhanced clock  
switching standard  
-
Integrated PLL conforms to Telcordia GR-1244-  
CORE Stratum 4 Enhanced switching standard  
-Holdover Mode with holdover frequency  
stability of 0.07 ppm  
- Jitter attenuation from 1.52 Hz.  
- Time interval error (TIE) correction  
- Master and Slave mode operation  
Non-multiplexed microprocessor interface  
Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,  
France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.  

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