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MT9080BP1 PDF预览

MT9080BP1

更新时间: 2024-11-19 14:53:59
品牌 Logo 应用领域
加拿大卓联 - ZARLINK /
页数 文件大小 规格书
31页 286K
描述
Digital Time Switch, PQCC84, LEAD FREE, PLASTIC, LCC-84

MT9080BP1 技术参数

生命周期:Obsolete包装说明:QCCJ,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.73JESD-30 代码:S-PQCC-J84
JESD-609代码:e3长度:29.31 mm
功能数量:1端子数量:84
最高工作温度:70 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
认证状态:Not Qualified座面最大高度:4.57 mm
标称供电电压:5 V表面贴装:YES
电信集成电路类型:DIGITAL TIME SWITCH温度等级:OTHER
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:29.31 mmBase Number Matches:1

MT9080BP1 数据手册

 浏览型号MT9080BP1的Datasheet PDF文件第2页浏览型号MT9080BP1的Datasheet PDF文件第3页浏览型号MT9080BP1的Datasheet PDF文件第4页浏览型号MT9080BP1的Datasheet PDF文件第5页浏览型号MT9080BP1的Datasheet PDF文件第6页浏览型号MT9080BP1的Datasheet PDF文件第7页 
MT9080B  
SMX - Switch Matrix Module  
Data Sheet  
March 2006  
Features  
16 bit wide data bus I/O  
Ordering Information  
16 bit address bus  
MT9080BP  
84 Pin PLCC  
84 Pin PLCC  
84 Pin PLCC*  
Tubes  
Tape & Reel  
Tubes  
MT9080BPR  
MT9080BP1  
MT9080BPR1  
Microprocessor Interface  
2048 x 16 bit wide memory SRAM  
84 Pin PLCC*  
Tape & Reel  
*Pb Free Matte Tin  
Interfaces with Zarlink’s MT9085B to form larger  
switch mitoses  
-40°C to +70°C  
Variable clock and frame rates  
Description  
Applications  
The MT9080B is a flexible memory module suitable for  
use as a basic building block in the construction of  
customized digital switching matrices. It can be  
configured as either a Data Memory or a Connection  
Memory, and is designed to interface with Zarlink’s  
MT9085B. Interface to the device is via 16 bit wide  
data and address busses. The MT9080B can operate  
with variable clock rates up to 16.7 MHz.  
Small and medium digital switch matrices  
Telephony equipment - PBX, CO equipment,  
digital cross connect, digital local loop  
Datacom equipment - access concentrators,  
Lan/Wan gateways  
16  
16  
D0i/D15i  
D0o/  
2048 x 16  
D15o  
16  
Static  
Memory  
16  
A0-A15  
Address  
MUX  
CRC  
11  
WR  
ENABLE  
PRECHARGE  
CD  
11 Bit  
Counter  
Control Interface  
Counter  
Reset  
ME  
FP  
CK ODE DS CS R/W Mx My Mz DTA  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 1999-2006, Zarlink Semiconductor Inc. All Rights Reserved.  

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