Datasheet > MT9045ANR

MT9045ANR

更新时间： 2024-01-29 06:39:44

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		电信光电二极管电信集成电路
页数	文件大小	规格书
24页	277K
描述
Telecom Circuit, 1-Func, PDSO48, 0.300 INCH, MO-118AA, SSOP-48

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技术参数
数据手册

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MT9045ANR 技术参数

是否无铅：	含铅	生命周期：	Obsolete
零件包装代码：	SSOP	包装说明：	,
针数：	48	Reach Compliance Code：	compliant
风险等级：	5.81

MT9045ANR 数据手册

MT9045

T1/E1/OC3 System Synchronizer

Data Sheet

DS5270

ISSUE 7

November 2002

Features

•

Supports AT&T TR62411 and Bellcore GR-

Ordering Information

1244-CORE Stratum 3, Stratum 4 Enhanced

and Stratum 4 timing for DS1 interfaces

Supports ITU-T G.813 Option 1 clocks for 2048

kbit/s interfaces

MT9045AN

48 Pin SSOP

-40 to +85 °C

•

Supports ITU-T G.812 Type IV clocks for 1,544

kbit/s interfaces and 2,048 kbit/s interfaces

Supports ETSI ETS 300 011, TBR 4, TBR 12

and TBR 13 timing for E1 interfaces

Selectable 19.44 MHz, 1.544MHz, 2.048MHz or

8kHz input reference signals

Provides C1.5, C2, C4, C6, C8, C16, and C19

(STS-3/OC3 clock divided by 8) output clock

signals

Description

The MT9045 T1/E1/OC3 System Synchronizer

contains a digital phase-locked loop (DPLL), which

provides timing and synchronization signals for

multitrunk T1 and E1 primary rate transmission links

and STS-3/OC3 links.

•

Provides 5 styles of 8 KHz framing pulses

Holdover frequency accuracy of 0.05 PPM

Holdover indication

The MT9045 generates ST-BUS clock and framing

signals that are phase locked to either a 19.44 MHz,

2.048MHz, 1.544MHz, or 8kHz input reference.

Attenuates wander from 1.9Hz

Fast lock mode

The MT9045 is compliant with AT&T TR62411 and

Bellcore GR-1244-CORE Stratum 3, Stratum 4

Enhanced, and Stratum 4 and ETSI ETS 300 011;

and ITU-T G.813 Option 1 for 2048 kbit/s interfaces.

It will meet the jitter/wander tolerance, jitter/wander

transfer, intrinsic jitter/wander, frequency accuracy,

capture range, phase change slope, holdover

frequency and MTIE requirements for these

specifications.

Provides Time Interval Error (TIE) correction

Accepts reference inputs from two independent

sources

•

JTAG Boundary Scan

Applications

•

Synchronization and timing control for

multitrunk T1,E1 and STS-3/OC3 systems

•

ST-BUS clock and frame pulse sources

TCLR

OSCi

OSCo

LOCK

VDD

VSS

Virtual

Master Clock

Reference

C19o

TIE

TCK

TDI

C1.5o

Corrector

Circuit

DPLL

IEEE

C2o

TMS

TRST

TDO

1149.1a

C4o

Output

Interface

Circuit

C6o

C8o

C16o

F0o

Selected

State

Select

Reference

Select

PRI

SEC

F8o

Input

MUX

TIE

F16o

Impairment

Monitor

Corrector

Enable

RSP

State

Prioor

Secoor

Reference

TSP

Select

Reference

Monitor

Select

Frequency

Select

RSEL

Control State Machine

MUX

Feedback

MS1 MS2

RST HOLDOVER PCCi FLOCK

FS1

FS2

Figure 1 - Functional Block Diagram

12 3 4 5 6 7...24

中文翻译

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与MT9045ANR相关器件

型号	品牌	获取价格	描述	数据表
MT9045ANR1	MICROSEMI	获取价格	Telecom Circuit, 1-Func, PDSO48, 0.300 INCH, LEAD FREE, MO-118AA, SSOP-48
MT9046	ZARLINK	获取价格	T1/E1 System Synchronizer with Holdover
MT9046AN	ZARLINK	获取价格	T1/E1 System Synchronizer with Holdover
MT9046AN1	MICROSEMI	获取价格	Telecom Circuit, 1-Func, PDSO48, 0.300 INCH, LEAD FREE, MO-118AA, SSOP-48
MT9046AN1	ZARLINK	获取价格	Telecom Circuit, 1-Func, PDSO48, 0.300 INCH, LEAD FREE, MO-118AA, SSOP-48
MT9046ANR	MICROSEMI	获取价格	Telecom IC, CMOS, PDSO48
MT9048	DBLECTRO	获取价格	Standard Type
MT90500	MITEL	获取价格	Multi-Channel ATM AAL1 SAR
MT90500AL	MITEL	获取价格	Multi-Channel ATM AAL1 SAR
MT90500AL	ZARLINK	获取价格	ATM Segmentation and Reassembly Device, 1-Func, PQFP240, 32 X 32 MM, 3.40 MM HEIGHT, PLAST

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