Datasheet > MT8VDDT6464A

MT8VDDT6464A

更新时间： 2024-02-21 13:40:15

品牌	Logo	应用领域
镁光 - MICRON		动态存储器双倍数据速率
页数	文件大小	规格书
30页	677K
描述
DDR SDRAM UNBUFFERED DIMM

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中文翻译

获取价格

数据手册

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MT8VDDT6464A 数据手册

128MB, 256MB, 512MB (x64, SR)

184-PIN DDR SDRAM UDIMM

MT8VDDT1664A – 128MB

MT8VDDT3264A – 256MB

MT8VDDT6464A – 512MB

DDR SDRAM

UNBUFFERED DIMM

For the latest data sheet, please refer to the Micron^Web

site: www.micron.com/products/modules

Fe a t u re s

Fig u re 1: 184-Pin DIMM (MO-206)

• 184-pin dual in-line memory module (DIMM)

• Fast data transfer rates: PC2100 or PC2700

• Utilizes 266 MT/ s and 333 MT/ s DDR SDRAM

components

Standard 1.25in. (31.75mm)

• 128MB (16 Meg x 64), 256MB (32 Meg x 64), and

512MB (64 Meg x 64)

• VDD = VDDQ = +2.5V

• VDDSPD = +2.3V to +3.6V

Low-Profile 1.15in. (29.21mm)

• 2.5V I/ O (SSTL_2 compatible)

• Com m ands entered on each positive CK edge

• DQS edge-aligned with data for READs; center-

aligned with data for WRITEs

• Internal, pipelined double data rate (DDR)

architecture; two data accesses per clock cycle

• Bidirectional data strobe (DQS) transmitted/

received with data—i.e., source-synchronous data

capture

• Differential clock inputs (CK and CK#)

• Four internal device banks for concurrent operation

• Program m able burst lengths: 2, 4, or 8

• Auto precharge option

• Auto Refresh and Self Refresh Modes

• 15.625µs (128MB), 7.8125µs (256MB, 512MB)

m axim um average periodic refresh interval

• Serial Presence Detect (SPD) with EEPROM

• Programmable READ CAS latency

• Gold edge contacts

OPTIONS

MARKING

• Package

184-pin DIMM (standard)

184-pin DIMM (lead-free)¹

• Memory Clock/ Speed, CAS Latency²

6ns (167 MHz), 333 MT/ s, CL = 2.5

7.5ns (133 MHz), 266 MT/ s, CL = 2

7.5ns (133 MHz), 266 MT/ s, CL = 2.5

• PCB

-335

-262¹

-26A¹

-265

Standard 1.25in. (31.75mm)

Low-Profile 1.15in. (29.21mm)

See page 2 note

NOTE: 1. Consult Micron for product availability.

2. CL = CAS (READ) Latency

Ta b le 1:

Ad d re ss Ta b le

128MB

256MB

512MB

4K (A0–A11)

4 (BA0, BA1)

128Mb (16 Meg x 8)

1K (A0–A9)

8K (A0–A12)

4 (BA0, BA1)

256Mb (32 Meg x 8)

1K (A0–A9)

Refresh Count

8K (A0–A12)

4 (BA0, BA1)

512Mb (64 Meg x 8)

2K (A0–A9, A11)

1 (S0#)

Row Addressing

Device Bank Addressing

Device Configuration

Column Addressing

Module Rank Addressing

1 (S0#)

pdf: 09005aef80867ab3, source: 09005aef80867a99

DD8C16_32_64x64AG.fm - Rev. G 9/04 EN

PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.

12 3 4 5 6 7...30

中文翻译

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