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MT8930CPR PDF预览

MT8930CPR

更新时间: 2024-01-06 01:36:12
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 电信电信集成电路
页数 文件大小 规格书
46页 654K
描述
Digital SLIC, 1-Func, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44

MT8930CPR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:LPCC
包装说明:QCCJ,针数:44
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.76JESD-30 代码:S-PQCC-J44
JESD-609代码:e0长度:16.585 mm
湿度敏感等级:1功能数量:1
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):225
认证状态:Not Qualified座面最大高度:4.57 mm
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:DIGITAL SLIC
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:16.585 mmBase Number Matches:1

MT8930CPR 数据手册

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CMOS ST-BUSFAMILY MT8930C  
Subscriber Network Interface Circuit  
ISSUE3  
November 1997  
Features  
ETS 300-012, CCITT I.430 and ANSI T1.605  
S/T interface  
Ordering Information  
MT8930CE  
MT8930CP  
28 Pin Plastic DIP  
44 Pin PLCC  
Full-duplex 2B+D, 192 kbit/s transmission  
Link activation/deactivation  
-40°C to +85°C  
D-channel access contention resolution  
Point-to-point, point-to-multipoint and star  
configurations  
Description  
Master (NT)/Slave (TE) modes of operation  
Exceeds loop length requirements  
The MT8930C Subscriber Network Interface Circuit  
(SNIC) implements the ETSI ETS 300-012, CCITT  
I.430 and ANSI T1.605 Recommendations for the  
ISDN S and T reference points. Providing point-to-  
point and point-to-multipoint digital transmission, the  
SNIC may be used at either end of the subscriber  
line (NT or TE).  
Complete loopback testing capabilities  
On chip HDLC D-channel protocoller  
8 bit Motorola/Intel microprocessor interface  
Controllerless or microprocessor-controlled  
operation  
Zarlink ST-BUS interface  
Low power CMOS technology  
Single 5 volt power supply  
An HDLC D-channel protocoller is included and  
controlled through a Motorola/Intel microprocessor  
port. A controllerless mode allows the SNIC to  
operate without a microprocessor.  
Applications  
The MT8930C is fabricated in Zarlink’s CMOS  
process.  
ISDN NT1  
ISDN S or T interface  
ISDN Terminal Adaptor (TA)  
Digital sets (TE1) - 4 wire ISDN interface  
Digital PABXs, Digital Line Cards (NT2)  
D-channel Priority  
Mechanism  
LTx  
DSTi  
ST-BUS  
Interface  
S-Bus  
Link  
Interface  
DSTo  
VBias  
LRx  
F0od  
C4b  
PLL  
HDLC  
Transceiver  
Timing  
and  
Control  
Link  
Activation  
Controller  
F0b  
STAR/Rsto  
CK/NT  
VDD  
Cmode  
VSS  
Microprocessor Interface  
Rsti  
HALF  
AD0-7  
R/W/WR,  
AFT/PRI  
DS/RD,  
DinB  
IRQ/NDA,  
DCack  
AS/ALE,  
P/SC  
CS,  
DReq  
Figure 1 - Functional Block Diagram  
9-33  

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