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MT8920BS1 PDF预览

MT8920BS1

更新时间: 2024-01-21 10:45:21
品牌 Logo 应用领域
美高森美 - MICROSEMI 电信光电二极管电信集成电路
页数 文件大小 规格书
28页 620K
描述
Telecom Circuit, 1-Func, CMOS, PDSO28, 0.300 INCH, LEAD FREE, MS-013AE, SOIC-28

MT8920BS1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.14JESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:17.9 mm
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2.65 mm标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

MT8920BS1 数据手册

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MT8920B  
ST-BUS Parallel Access Circuit  
Data Sheet  
August 2005  
Features  
High speed parallel access to the serial  
ST-BUS  
Ordering Information  
Parallel bus optimized for 68000 µP (mode 1)  
Fast dual-port RAM access (mode 2)  
Access time: 120 nsec  
MT8920BE  
MT8920BP  
MT8920BS  
MT8920BE1  
MT8920BP1  
MT8920BS1  
28 Pin PDIP  
28 Pin PLCC  
28 Pin SOIC  
28 Pin PDIP*  
28 Pin PLCC*  
28 Pin SOIC*  
Tubes  
Tubes  
Tubes  
Parallel bus controller (mode 3) - no external  
Tubes  
controller required  
Tubes  
Flexible interrupt capabilities - two  
independent/programmable interrupt sources  
with auto-vectoring  
Tubes  
MT8920BPR1 28 Pin PLCC*  
*PB Free Matte Tin  
Tape & Reel  
Selectable 24 and 32 channel operation  
Programmable loop-around modes  
Low power CMOS technology  
-40°C to 85°C  
Description  
Applications  
The ST-BUS Parallel Access Circuit (STPA) provides  
a simple interface between Zarlink’s ST-BUS and  
parallel system environments.  
Parallel control/data access to T1/CEPT digital  
trunk interfaces  
Digital signal processor interface to ST-BUS  
Computer to Digital PABX link  
Voice store and forward systems  
Interprocessor communications  
Tx0  
Parallel-  
D7-D0  
Dual Port Ram  
32 X 8  
to-serial  
STo0  
STi0  
Converter  
A4-A0  
Rx0  
Dual Port Ram  
32 X 8  
Serial-to-  
Parallel  
CS  
DS, OE  
Converter  
Parallel  
Port  
R/W, WE  
Interface  
Tx1  
Dual Port Ram  
32 X 8  
Parallel-  
to-Serial  
Converter  
DTACK,  
BUSY, DCS  
STo1  
Interrupt  
Registers  
IRQ, 24/32  
Comp/  
MUX  
Control  
Registers  
IACK, MS1  
A5, STCH  
MMS  
F0i  
C4i  
Address  
Generator  
VSS  
VDD  
Figure 1 - Functional Block Diagram  
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2002-2005, Zarlink Semiconductor Inc. All Rights Reserved.  
1

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