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MT88L70AC PDF预览

MT88L70AC

更新时间: 2024-02-11 21:24:48
品牌 Logo 应用领域
MITEL 电信集成电路
页数 文件大小 规格书
10页 119K
描述
3 Volt Integrated DTMF Receiver

MT88L70AC 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.71
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态:Not Qualified
座面最大高度:1.2 mm标称供电电压:3 V
表面贴装:YES电信集成电路类型:DTMF SIGNALING CIRCUIT
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

MT88L70AC 数据手册

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ISO2-CMOS  
MT88L70  
3 Volt Integrated DTMF Receiver  
ISSUE 2  
May 1995  
Features  
2.7 - 3.6 volt operation  
Ordering Information  
Complete DTMF receiver  
Low power consumption  
Internal gain setting amplifier  
Adjustable guard time  
MT88L70AC  
18 Pin Ceramic DIP  
MT88L70AE  
MT88L70AS  
MT88L70AN  
MT88L70AT  
18 Pin Plastic DIP  
18 Pin SOIC  
20 Pin SSOP  
20 Pin TSSOP  
Central office quality  
-40 °C to + 85 °C  
Power-down mode  
Inhibit mode  
Description  
Functionally compatible with Mitel’s MT8870D  
The MT88L70 is a complete 3 Volt, DTMF receiver  
integrating both the bandsplit filter and digital  
decoder functions. The filter section uses switched  
capacitor techniques for high and low group  
Applications  
Paging systems  
Repeater systems/mobile radio  
Credit card systems  
filters;  
the  
decoder  
uses digital counting  
techniques to detect and decode all 16 DTMF tone-  
pairs into a 4-bit code. External component count is  
minimized by on chip provision of a differential input  
amplifier, clock oscillator and latched three-state bus  
interface.  
Remote control  
Personal computers  
Telephone answering machine  
VDD  
VSS  
VRef  
INH  
Bias  
Circuit  
PWDN  
VRef  
Buffer  
Q1  
Chip Chip  
Power Bias  
High Group  
Filter  
Digital  
Detection  
Algorithm  
Code  
Converter  
and Latch  
Q2  
Q3  
Q4  
IN +  
Dial  
Tone  
Filter  
Zero Crossing  
Detectors  
IN -  
GS  
Low Group  
Filter  
to all  
St  
GT  
Steering  
Logic  
Chip  
Clocks  
OSC1  
OSC2  
St/GT  
ESt  
STD  
TOE  
Figure 1 - Functional Block Diagram  
4-23  

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