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MT8885E

更新时间： 2024-01-05 10:57:17
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 电信光电二极管电信集成电路
页数 文件大小 规格书
28页 498K
描述
DTMF Signaling Circuit, CMOS, PDIP24,

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MT8885E 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：DIP, DIP24,.6Reach Compliance Code：unknown
风险等级：5.85JESD-30 代码：R-PDIP-T24
JESD-609代码：e0端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP24,.6封装形状：RECTANGULAR
封装形式：IN-LINE电源：5 V
认证状态：Not Qualified子类别：Telecom Signaling Circuits
最大压摆率：11 mA标称供电电压：5 V
表面贴装：NO技术：CMOS
电信集成电路类型：DTMF SIGNALING CIRCUIT温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
Base Number Matches：1

MT8885E 数据手册

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MT8885  
Integrated DTMF Transceiver with Power  
Down and Adaptive Micro Interface  
Data Sheet  
February 2004  
Features  
•
•
•
Central office quality DTMF transmitter/receiver  
Ordering Information  
Single 5 Volt power supply  
MT8885E  
MT8885AN  
MT8885AP  
24 Pin Plastic DIP (300mil)  
24 Pin SSOP  
Adaptive micro interface enables compatibility  
with Intel and Motorola processors  
28 Pin PLCC  
-40°C to +85°C  
•
DTMF transmitter/receiver power-down via  
register control or power-down pin  
Description  
•
•
•
Adjustable guard time  
The MT8885 is a monolithic DTMF transceiver with call  
progress filter. It is fabricated in CMOS technology  
offering low power consumption and high reliability.  
Automatic tone burst mode  
Call progress tone detection to -30 dBm  
The receiver section is based upon the industry  
standard MT8870 DTMF receiver. The transmitter  
utilizes a switched capacitor D/A converter for low  
distortion, high accuracy DTMF signalling. Internal  
counters provide a burst mode such that tone bursts  
can be transmitted with precise timing. A call progress  
filter can be selected allowing a microprocessor to  
analyze call progress tones.  
Applications  
•
•
•
•
•
•
Credit card systems  
Paging systems  
Repeater systems/mobile radio  
Interconnect dialers  
Pay phones  
The MT8885 utilizes an adaptive micro interface, which  
allows the device to be connected to a number of  
popular microcontrollers with minimal external logic.  
The MT8885 provides enhanced power-down features.  
The transmitter and receiver may independently be  
powered down via register control.  
Remote monitor/Control systems  
D0  
Data  
Row and  
Column  
Counters  
D/A  
Converters  
Transmit Data  
Bus  
D1  
D2  
D3  
∑
TONE  
Register  
Buffer  
Status  
Register  
Interrupt  
Logic  
Tone Burst  
Gating Cct.  
Control  
Logic  
IRQ/CP  
Control  
Register  
A
IN+  
IN-  
GS  
+
-
Dial  
Tone  
Filter  
High Group  
Filter  
Digital  
DS/RD  
CS  
Algorithm  
and Code  
Converter  
Control  
Register  
B
I/O  
Control  
Low Group  
Filter  
OSC1  
OSC2  
Oscillator  
R/W/WR  
RS0  
Circuit  
Control  
Logic  
Receive Data  
Register  
Steering  
Logic  
Bias  
Circuit  
V
V
V
SS  
PWDN  
ESt  
St/GT  
DD Ref  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 1996 - 2004, Zarlink Semiconductor Inc. All Rights Reserved.  
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