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MT8885ANR

更新时间: 2024-02-23 04:56:35
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 电信光电二极管电信集成电路
页数 文件大小 规格书
30页 627K
描述
DTMF Signaling Circuit, CMOS, PDSO24, 5.30 MM, MO-150AG, SSOP-24

MT8885ANR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.74
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:8.2 mm湿度敏感等级:3
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:2 mm标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:DTMF SIGNALING CIRCUIT温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm
Base Number Matches:1

MT8885ANR 数据手册

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MT8885  
Integrated DTMF Transceiver with  
Power Down and Adaptive Micro Interface  
Preliminary Information  
ISSUE 2  
December 1996  
Features  
Ordering Information  
Central office quality DTMF transmitter/receiver  
MT8885AE  
MT8885AN  
MT8885AP  
24 Pin Plastic DIP (300mil)  
24 Pin SSOP  
28 Pin PLCC  
Single 5 Volt power supply  
Adaptive micro interface enables compatibility  
with Intel and Motorola processors  
-40°C to +85°C  
DTMF transmitter/receiver power-down via  
register control or power-down pin  
Description  
Adjustable guard time  
The MT8885 is a monolithic DTMF transceiver with  
call progress filter. It is fabricated in CMOS  
technology offering low power consumption and high  
reliability.  
Automatic tone burst mode  
Call progress tone detection to -30dBm  
Applications  
The receiver section is based upon the industry  
standard MT8870 DTMF receiver. The transmitter  
utilizes a switched capacitor D/A converter for low  
distortion, high accuracy DTMF signalling. Internal  
counters provide a burst mode such that tone bursts  
can be transmitted with precise timing. A call  
Credit card systems  
Paging systems  
Repeater systems/mobile radio  
Interconnect dialers  
Pay phones  
progress filter can be selected allowing  
microprocessor to analyze call progress tones.  
a
Remote monitor/Control systems  
The MT8885 utilizes an adaptive micro interface,  
which allows the device to be connected to a number  
of popular microcontrollers with minimal external  
logic. The MT8885 provides enhanced power-down  
features. The transmitter and receiver may  
independently be powered down via register control.  
D0  
Data  
Row and  
Column  
Counters  
D/A  
Converters  
Transmit Data  
Bus  
D1  
D2  
D3  
TONE  
Register  
Buffer  
Status  
Register  
Interrupt  
Logic  
Tone Burst  
Gating Cct.  
Control  
Logic  
IRQ/CP  
Control  
Register  
A
IN+  
IN-  
GS  
+
-
Dial  
Tone  
Filter  
High Group  
Filter  
Digital  
DS/RD  
CS  
Algorithm  
and Code  
Converter  
Control  
Register  
B
I/O  
Control  
Low Group  
Filter  
OSC1  
OSC2  
Oscillator  
R/W/WR  
RS0  
Circuit  
Control  
Logic  
Receive Data  
Register  
Steering  
Logic  
Bias  
Circuit  
V
V
V
SS  
PWDN  
ESt  
St/GT  
DD Ref  
Figure 1 - Functional Block Diagram  
4-51  

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