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MT5C6404C-25/883C PDF预览

MT5C6404C-25/883C

更新时间: 2024-01-11 16:00:13
品牌 Logo 应用领域
MICROSS 静态存储器内存集成电路
页数 文件大小 规格书
10页 330K
描述
Standard SRAM, 16KX4, 25ns, CMOS, CDIP22, 0.300 INCH, CERAMIC, DIP-22

MT5C6404C-25/883C 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP22,.3针数:22
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.15
最长访问时间:25 nsI/O 类型:COMMON
JESD-30 代码:R-CDIP-T22长度:29.337 mm
内存密度:65536 bit内存集成电路类型:STANDARD SRAM
内存宽度:4功能数量:1
端口数量:1端子数量:22
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16KX4
输出特性:3-STATE可输出:NO
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装等效代码:DIP22,.3封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
电源:5 V认证状态:Not Qualified
筛选级别:MIL-STD-883 Class C座面最大高度:5.08 mm
最大待机电流:0.005 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.1 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

MT5C6404C-25/883C 数据手册

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SRAM  
MT5C6404  
Austin Semiconductor, Inc.  
16K x 4 SRAM  
SRAM MEMORY ARRAY  
PIN ASSIGNMENT  
(Top View)  
22-Pin DIP (C)  
(300 MIL)  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
A5  
A6  
1
2
3
4
5
6
7
8
9
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
Vcc  
A4  
SMD 5962-86859  
SMD 5962-89692  
MIL-STD-883  
A7  
A8  
A9  
A3  
A2  
A1  
A10  
A11  
A12  
A13  
CE\ 10  
Vss 11  
A0  
DQ4  
DQ3  
DQ2  
DQ1  
WE\  
FEATURES  
• Speeds: 12, 15, 20, 25, 35, 45, 55, and 70ns  
• Battery Backup: 2V data retention  
• High-performance, low-power CMOS double-metal  
process  
• Single +5V (+10%) Power Supply  
• Easy memory expansion with CE\  
• All inputs and outputs are TTL compatible  
GENERAL DESCRIPTION  
The Austin Semiconductor SRAM family employs  
high-speed, low-power CMOS designs using a four-transistor  
memory cell. Austin Semiconductor SRAMs are fabricated  
using double-layer metal, double-layer polysilicon  
technology.  
For flexibility in high-speed memory applications, Austin  
Semiconductor offers chip enable (CE\) on all organizations.  
This enhancement can place the outputs in High-Z for  
additional flexibility in system design.  
Writing to these devices is accomplished when write  
enable (WE\) and CE\ inputs are both LOW. Reading is  
accomplished when WE\ remains HIGH and CE\ goes LOW.  
The device offers a reduced power standby mode when  
disabled. This allows system designs to achieve low standby  
power requirements.  
OPTIONS  
• Timing  
MARKING  
12ns access  
15ns access  
20ns access  
25ns access  
35ns access  
45ns access  
55ns access  
70ns access  
-12  
-15  
-20  
-25  
-35  
-45*  
-55*  
-70*  
• Package(s)  
Ceramic DIP (300 mil)  
C
No. 105  
All devices operate from a single +5V power supply and  
all inputs and outputs are fully TTL compatible.  
• OperatingTemperature Ranges  
Industrial (-40oC to +85oC)  
Military (-55oC to +125oC)  
IT  
XT  
• 2V data retention/low power  
L
For more products and information  
please visit our web site at  
*Electrical characteristics identical to those provided for the 35ns  
access devices.  
www.austinsemiconductor.com  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C6404  
Rev. 1.1 06/05  
1

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