5秒后页面跳转
MT5C1008EC-70L/883C PDF预览

MT5C1008EC-70L/883C

更新时间: 2024-10-31 05:50:35
品牌 Logo 应用领域
AUSTIN 内存集成电路静态存储器输出元件输入元件
页数 文件大小 规格书
17页 185K
描述
128K x 8 SRAM WITH DUAL CHIP ENABLE AVAILABLE AS MILITARY SPECIFICATIONS

MT5C1008EC-70L/883C 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:End Of Life零件包装代码:DLCC
包装说明:SON, SOLCC32,.4针数:32
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.33
Is Samacsys:N最长访问时间:45 ns
其他特性:TTL COMPATIBLE INPUTS/OUTPUTS, 2V DATA RETENTION, BATTERY BACKUP, LOW POWER STANDBYI/O 类型:COMMON
JESD-30 代码:R-CDSO-N32JESD-609代码:e0
长度:20.828 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:128KX8
输出特性:3-STATE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:SON封装等效代码:SOLCC32,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
筛选级别:MIL-STD-883 Class C座面最大高度:2.54 mm
最大待机电流:0.001 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.115 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

MT5C1008EC-70L/883C 数据手册

 浏览型号MT5C1008EC-70L/883C的Datasheet PDF文件第2页浏览型号MT5C1008EC-70L/883C的Datasheet PDF文件第3页浏览型号MT5C1008EC-70L/883C的Datasheet PDF文件第4页浏览型号MT5C1008EC-70L/883C的Datasheet PDF文件第5页浏览型号MT5C1008EC-70L/883C的Datasheet PDF文件第6页浏览型号MT5C1008EC-70L/883C的Datasheet PDF文件第7页 
SRAM  
MT5C1008  
Austin Semiconductor, Inc.  
128K x 8 SRAM  
PIN ASSIGNMENT  
(Top View)  
WITH DUAL CHIP ENABLE  
32-Pin DIP (C, CW)  
32-Pin CSOJ (SOJ)  
32-Pin LCC (EC)  
32-Pin SOJ (DCJ)  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
•SMD 5962-89598  
•MIL-STD-883  
VCC  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2 10  
A1 11  
A0 12  
DQ1 13  
DQ2 14  
DQ3 15  
1
2
3
4
5
6
7
8
9
32  
VCC  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
DQ1  
DQ2  
DQ3  
VSS  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
31 A15  
30 CE2  
29 WE\  
28 A13  
27 A8  
A15  
CE2  
WE\  
A13  
A8  
A9  
FEATURES  
26 A9  
A11  
OE\  
A10  
CE\  
DQ8  
DQ7  
DQ6  
DQ5  
DQ4  
25 A11  
24 OE\  
23 A10  
22 CE\  
21 DQ8  
20 DQ7  
19 DQ6  
18 DQ5  
17 DQ4  
• High Speed: 12, 15, 20, 25, 35, 45, 55 and 70 ns  
• Battery Backup: 2V data retention  
• Low power standby  
• High-performance, low-power CMOS process  
• Single +5V (+10%) Power Supply  
• Easy memory expansion with CE1\, CE2, and OE\  
options.  
VSS  
16  
32-Pin LCC (ECA)  
32-Pin Flat Pack (F)  
• All inputs and outputs are TTL compatible  
4
3 2 1 32 31 30  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2 10  
A1 11  
A0 12  
DQ1 13  
DQ2 14  
DQ3 15  
VSS 16  
1
2
3
4
5
6
7
8
9
32 VCC  
31 A15  
30 CE2  
29 WE\  
28 A13  
27 A8  
5
6
7
8
9
10  
11  
12  
13  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
DQ1  
29  
28  
27  
26  
25  
24  
23  
22  
21  
WE  
\
A13  
A8  
26 A9  
A9  
25 A11  
24 OE\  
23 A10  
22 CE\  
21 DQ8  
20 DQ7  
19 DQ6  
18 DQ5  
17 DQ4  
A11  
\
A10  
CE1  
OPTIONS  
• Timing  
MARKING  
OE  
\
DQ8  
12ns access  
15ns access  
20ns access  
25ns access  
35ns access  
45ns access  
55ns access  
70ns access  
-12 (contact factory)  
-15  
14 15 16 17 18 19 20  
-20  
-25  
-35  
-45  
-55*  
-70*  
GENERAL DESCRIPTION  
The MT5C1008 SRAM employs high-speed, low power  
CMOS designs using a four-transistor memory cell, and are  
fabricated using double-layer metal, double-layer polysilicon  
technology.  
For design flexibility in high-speed memory  
applications, this device offers dual chip enables (CE1\, CE2)  
and output enable (OE\). These control pins can place the  
outputs in High-Z for additional flexibility in system design.  
All devices operate from a single +5V power supply and all  
inputs and outputs are fully TTL compatible.  
Writing to these devices is accomplished when write  
enable (WE\) and CE1\ inputs are both LOW and CE2 is HIGH.  
Reading is accomplished when WE\ and CE2 remain HIGH and  
CE1\ and OE\ go LOW. The devices offer a reduced power  
standby mode when disabled, allowing system designs to  
achieve low standby power requirements.  
• Package(s)•  
Ceramic DIP (400 mil)  
Ceramic DIP (600 mil)  
Ceramic LCC  
Ceramic LCC  
Ceramic Flatpack  
Ceramic SOJ  
C
No. 111  
No. 112  
No. 207  
No. 208  
No. 303  
No. 501  
No. 507  
CW  
EC  
ECA  
F
DCJ  
SOJ  
Ceramic SOJ  
• 2V data retention/low power  
L
*Electrical characteristics identical to those provided for the 45ns  
access devices.  
The “L” version offers a 2V data retention mode, re-  
ducing current consumption to 1mA maximum.  
For more products and information  
please visit our web site at  
www.austinsemiconductor.com  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1008  
Rev. 6.5 7/02  
1

与MT5C1008EC-70L/883C相关器件

型号 品牌 获取价格 描述 数据表
MT5C1008EC-70L/IT MICROSS

获取价格

Standard SRAM, 128KX8, 45ns, CMOS, CDSO32, CERAMIC, LCC-32
MT5C1008EC-70L/XT MICROSS

获取价格

Standard SRAM, 128KX8, 45ns, CMOS, CDSO32, CERAMIC, LCC-32
MT5C1008EC-70LE/IT MICROSS

获取价格

Standard SRAM, 128KX8, 70ns, CMOS, CDSO32
MT5C1008EC-70LE/XT MICROSS

获取价格

Standard SRAM, 128KX8, 70ns, CMOS, CDSO32
MT5C1008EC-85L/883C MICROSS

获取价格

Standard SRAM
MT5C1008EC-85L/IT MICROSS

获取价格

Standard SRAM
MT5C1008ECA-100/IT MICROSS

获取价格

Standard SRAM
MT5C1008ECA-100L/IT MICROSS

获取价格

Standard SRAM
MT5C1008ECA-12 AUSTIN

获取价格

128K x 8 SRAM WITH DUAL CHIP ENABLE AVAILABLE AS MILITARY SPECIFICATIONS
MT5C1008ECA-12/IT MICROSS

获取价格

Standard SRAM, 128KX8, 12ns, CMOS, CQCC32, CERAMIC, LCC-32