Datasheet > MT58L128V18PF-10

MT58L128V18PF-10

更新时间： 2024-11-08 09:23:31

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
25页	647K
描述
Standard SRAM, 128KX18, 5ns, CMOS, PBGA165, FBGA-165

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中文翻译

获取价格

数据手册

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MT58L128V18PF-10 数据手册

2Mb : 128K x 18, 64K x 32/36

PIPELINED, SCD SYNCBURST SRAM

2Mb SYNCBURST^™

SRAM

MT58L128L18P, MT58L64L32P, MT58L64L36P;

MT58L128V18P, MT58L64V32P, MT58L64V36P

3.3V VDD, 3.3V o r 2.5V I/O, Pip e lin e d , Sin g le -

Cycle De se le ct

FEATURES

• Fast clock and OE# access times

• Single +3.3V +0.3V/-0.165V power supply (V^DD)

• Separate +3.3V or +2.5V isolated output buffer

supply (VDDQ)

100-Pin TQFP*

• SNOOZE MODE for reduced-power standby

• Single-cycle deselect (Pentium^®BSRAM-compatible)

• Common data inputs and data outputs

• Individual BYTE WRITE control and GLOBAL

WRITE

• Three chip enables for simple depth expansion

and address pipelining

• Clock-controlled and registered addresses, data

I/Os and control signals

• Internally self-timed WRITE cycle

• Burst control pin (interleaved or linear burst)

• Automatic power-down for portable applications

• 100-pin TQFP package

165-Pin FBGA

(Preliminary Package Data)

• 165-pin FBGA package

• Low capacitive bus loading

• x18, x32, and x36 options available

OPTIONS

MARKING

• Timing (Access/Cycle/MHz)

3.5ns/5ns/200 MHz

3.5ns/6ns/166 MHz

4.0ns/7.5ns/133 MHz

5ns/10ns/100 MHz

-5

-6

-7.5

-10

• Configurations

3.3V I/O

128K x 18

64K x 32

64K x 36

MT58L128L18P

MT58L64L32P

MT58L64L36P

*JEDEC-standard MS-026 BHA (LQFP).

2.5V I/O

128K x 18

64K x 32

64K x 36

MT58L128V18P

MT58L64V32P

MT58L64V36P

GENERAL DESCRIPTION

The Micron^®SyncBurst^™SRAM family employs

high-speed, low-power CMOS designs that are fabri-

cated using an advanced CMOS process.

• Package

100-pin TQFP

165-pin FBGA

Micron’s 2Mb SyncBurst SRAMs integrate a 128K x

18, 64K x 32, or 64K x 36 SRAM core with advanced

synchronous peripheral circuitry and a 2-bit burst

counter. All synchronous inputs pass through registers

controlled by a positive-edge-triggered single clock

input (CLK). The synchronous inputs include all

addresses,alldatainputs,activeLOWchipenable(CE#),

two additional chip enables for easy depth expansion

• Operating Temperature Range

Commercial (0°C to +70°C)

None

Part Number Example:

MT58L128L18PT-10*

* A Part Marking Guide for the FBGA devices can be found on Micron’s

website—http://www.micronsemi.com/support/index.html.

2Mb:128Kx18, 64Kx32/36Pipelined, SCDSyncBurstSRAM

MT58L128L18P_2.p65 – Rev. 8/00

MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.

12 3 4 5 6 7...25

中文翻译

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与MT58L128V18PF-10相关器件

型号	品牌	获取价格	描述	数据表
MT58L128V18PF-10IT	CYPRESS	获取价格	Standard SRAM, 128KX18, 5ns, CMOS, PBGA165, FBGA-165
MT58L128V18PF-5	CYPRESS	获取价格	Standard SRAM, 128KX18, 3.5ns, CMOS, PBGA165, FBGA-165
MT58L128V18PF-6	CYPRESS	获取价格	Standard SRAM, 128KX18, 3.5ns, CMOS, PBGA165, FBGA-165
MT58L128V18PF-7.5IT	CYPRESS	获取价格	Standard SRAM, 128KX18, 4ns, CMOS, PBGA165, FBGA-165
MT58L128V18PT-10T	CYPRESS	获取价格	Standard SRAM, 128KX18, 5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
MT58L128V18PT-5T	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
MT58L128V18PT-6IT	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100
MT58L128V18PT-6T	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
MT58L128V18PT-7.5T	CYPRESS	获取价格	Cache SRAM, 128KX18, 4ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
MT58L128V32F1	MICRON	获取价格	4Mb: 256K x 18, 128K x 32/36 FLOW-THROUGH SYNCBURST SRAM

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