Datasheet > MT58L128L18PT-10T

MT58L128L18PT-10T

更新时间： 2023-02-26 15:39:14

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
17页	306K
描述
Cache SRAM, 128KX18, 5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MT58L128L18PT-10T 数据手册

浏览型号MT58L128L18PT-10T的Datasheet PDF文件第3页

浏览型号MT58L128L18PT-10T的Datasheet PDF文件第4页

浏览型号MT58L128L18PT-10T的Datasheet PDF文件第5页

浏览型号MT58L128L18PT-10T的Datasheet PDF文件第7页

浏览型号MT58L128L18PT-10T的Datasheet PDF文件第8页

浏览型号MT58L128L18PT-10T的Datasheet PDF文件第9页

2Mb: 128K x 18, 64K x 32/36

PIPELINED, SCD SYNCBURST SRAM

TQFP PIN DESCRIPTIONS (continued)

x18

x32/x36

SYMBOL

TYPE

DESCRIPTION

ADSC#

Input Synchronous Address Status Controller: This active LOW input

interrupts any ongoing burst, causing a new external address to be

registered. A READ or WRITE is performed using the new address if

CE# is LOW. ADSC# is also used to place the chip into power-down

state when CE# is HIGH.

MODE

Input Mode: This input selects the burst sequence. A LOW on this pin

selects “linear burst.” NC or HIGH on this pin selects “interleaved

burst.” Do not alter input state while device is operating.

Input Snooze Enable: This active HIGH, asynchronous input causes the

device to enter a low-power standby mode in which all data in the

memory array is retained. When ZZ is active, all other inputs are

ignored.

(a) 58, 59,

62, 63, 68, 69, 56-59, 62, 63

72, 73

(a) 52, 53,

DQa

DQb

Input/ SRAM Data I/Os: For the x18 version, Byte “a” is DQa pins; Byte “b”

Output is DQb pins. For the x32 and x36 versions, Byte “a” is DQa pins;

Byte “b” is DQb pins; Byte “c” is DQc pins; Byte “d” is DQd pins. Input

data must meet setup and hold times around the rising edge of CLK.

(b) 8, 9, 12,

(b) 68, 69,

13, 18, 19, 22, 72-75, 78, 79

12, 13

(d) 18, 19,

22-25, 28, 29

DQc

DQd

–

NC/DQPa NC/ No Connect/Parity Data I/Os: On the x32 version, these pins are No

NC/DQPb

NC/DQPc

NC/DQPd

I/O

Connect (NC). On the x18 version, Byte “a” parity is DQPa; Byte “b”

parity is DQPb. On the x36 version, Byte “a” parity is DQPa; Byte “b”

parity is DQPb; Byte “c” parity is DQPc; Byte “d” parity is DQPd.

–

14, 15, 41, 65, 14, 15, 41, 65,

91 91

VDD

VDDQ

VSS

Supply Power Supply: See DC Electrical Characteristics and Operating

Conditions for range.

4, 11, 20, 27, 4, 11, 20, 27,

54, 61, 70, 77 54, 61, 70, 77

Supply Isolated Output Buffer Supply: See DC Electrical Characteristics and

Operating Conditions for range.

5, 10, 17, 21, 5, 10, 17, 21,

26, 40, 55, 60, 26, 40, 55, 60,

67, 71, 76, 90 67, 71, 76, 90

Supply Ground: GND.

38, 39, 42, 43 38, 39, 42, 43

DNU

–

Do Not Use: These signals may either be unconnected or wired to

GND to improve package heat dissipation.

1-3, 6, 7, 16,

25, 28-30,

16, 66

No Connect: These signals are not internally connected and may be

connected to ground to improve package heat dissipation.

51-53, 56, 57,

66, 75, 78, 79,

95, 96

NC/SA

–

No Connect: This pin is reserved for address expansion.

2Mb: 128K x 18, 64K x 32/36 Pipelined, SCD SyncBurst SRAM

MT58L128L18P.p65 – Rev. 7/99

Micron Technology, Inc., reserves the right to change products or specifications without notice.

1999, Micron Technology, Inc.

1...3 4 567 8 9...17

中文翻译

下载PDF

与MT58L128L18PT-10T相关器件

型号	品牌	获取价格	描述	数据表
MT58L128L18PT-5	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100
MT58L128L18PT-5IT	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100
MT58L128L18PT-6IT	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100
MT58L128L18PT-6T	CYPRESS	获取价格	Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
MT58L128L18PT-7.5IT	CYPRESS	获取价格	Cache SRAM, 128KX18, 4ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100
MT58L128L18PT-7.5T	CYPRESS	获取价格	Standard SRAM, 128KX18, 4ns, CMOS, PQFP100, PLASTIC, MS-026, TQFP-100
MT58L128L32D1B-5	CYPRESS	获取价格	Standard SRAM, 128KX32, 2.8ns, CMOS, PBGA119, 14 X 22 MM, BGA-119
MT58L128L32D1B-5IT	CYPRESS	获取价格	Standard SRAM, 128KX32, 2.8ns, CMOS, PBGA119, 14 X 22 MM, BGA-119
MT58L128L32D1T-5IT	CYPRESS	获取价格	Standard SRAM, 128KX32, 2.8ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100
MT58L128L32F1	MICRON	获取价格	4Mb: 256K x 18, 128K x 32/36 FLOW-THROUGH SYNCBURST SRAM

与MT58L128L18PT-10T相关文章

压敏电阻器在直流电路中的过压保护应用探讨
2024-06-07

2
电感耐压值及其与电感大小的关系
2024-06-07

5
CNY17F光耦合器：特性、应用、封装、引脚功能及替换型号解析
2024-06-07

4
DS1307资料解析：特性、引脚说明、替代推荐
2024-06-07

3

产品中心

服务支持

精选活动

关于我们

帮助中心

MT58L128L18PT-10T

MT58L128L18PT-10T 数据手册

与MT58L128L18PT-10T相关器件

与MT58L128L18PT-10T相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MT58L128L18PT-10T

MT58L128L18PT-10T 数据手册

与MT58L128L18PT-10T相关器件

与MT58L128L18PT-10T相关文章

您还可以找

您在本页遇到什么问题？