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MT55L256L32PF-6 PDF预览

MT55L256L32PF-6

更新时间: 2024-01-30 07:48:29
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器
页数 文件大小 规格书
25页 304K
描述
ZBT SRAM, 256KX32, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165

MT55L256L32PF-6 技术参数

生命周期:Transferred零件包装代码:BGA
包装说明:TBGA,针数:165
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.6
Is Samacsys:N最长访问时间:3.5 ns
JESD-30 代码:R-PBGA-B165JESD-609代码:e1
长度:15 mm内存密度:8388608 bit
内存集成电路类型:ZBT SRAM内存宽度:32
功能数量:1端子数量:165
字数:262144 words字数代码:256000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX32
封装主体材料:PLASTIC/EPOXY封装代码:TBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, THIN PROFILE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN SILVER COPPER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM宽度:13 mm
Base Number Matches:1

MT55L256L32PF-6 数据手册

 浏览型号MT55L256L32PF-6的Datasheet PDF文件第2页浏览型号MT55L256L32PF-6的Datasheet PDF文件第3页浏览型号MT55L256L32PF-6的Datasheet PDF文件第4页浏览型号MT55L256L32PF-6的Datasheet PDF文件第5页浏览型号MT55L256L32PF-6的Datasheet PDF文件第6页浏览型号MT55L256L32PF-6的Datasheet PDF文件第7页 
8Mb: 512K x 18, 256K x 32/36  
PIPELINED ZBT SRAM  
MT55L512L18P, MT55L512V18P,  
MT55L256L32P, MT55L256V32P,  
MT55L256L36P, MT55L256V36P  
8Mb  
ZBT® SRAM  
3.3V VDD, 3.3V or 2.5V I/O  
FEATURES  
1
100-PinTQFP  
• High frequency and 100 percent bus utilization  
• Fast cycle times: 6ns, 7.5ns and 10ns  
• Single +3.3V 5ꢀ poꢁer supply ꢂVDD)  
• Separate +3.3V or +2.5V isolated output buffer  
supply ꢂVDDQ)  
• Advanced control logic for minimum control  
signal interface  
• Individual BYTE WRITE controls may be tied LOW  
• Single R/W# ꢂread/ꢁrite) control pin  
• CKE# pin to enable clock and suspend operations  
• Three chip enables for simple depth expansion  
• Clock-controlled and registered addresses, data  
I/Os and control signals  
• Internally self-timed, fully coherent WRITE  
• Internally self-timed, registered outputs to  
eliminate the need to control OE#  
• SNOOZE MODE for reduced-poꢁer standby  
• Common data inputs and data outputs  
• Linear or Interleaved Burst Modes  
• Burst feature ꢂoptional)  
165-PinFBGA  
• Pin/function compatibility ꢁith 2Mb, 4Mb, and  
18Mb ZBT SRAM  
• Automatic poꢁer-doꢁn  
• 100-pin TQFP package  
• 165-pin FBGA package  
NOTE: 1. JEDEC-standardMS-026BHA(LQFP).  
OPTIONS  
MARKING  
• Timing ꢂAccess/Cycle/MHz)  
3.5ns/6ns/166 MHz  
4.2ns/7.5ns/133 MHz  
5ns/10ns/100 MHz  
* A Part Marking Guide for the FBGA devices can be found on Micron’s  
Website—http://ꢁꢁꢁ.micron.com/support/index.html.  
** Industrial temperature range offered in specific speed grades and  
configurations. Contact factory for more information.  
-6  
-7.5  
-10  
• Configurations  
3.3V I/O  
GENERALDESCRIPTION  
512K x 18  
256K x 32  
256K x 36  
2.5V I/O  
MT55L512L18P  
MT55L256L32P  
MT55L256L36P  
The Micron® Zero Bus TurnaroundꢂZBT®) SRAM  
family employs high-speed, loꢁ-poꢁer CMOS designs  
using an advanced CMOS process.  
512K x 18  
256K x 32  
256K x 36  
MT55L512V18P  
MT55L256V32P  
MT55L256V36P  
Micron’s 8Mb ZBT SRAMs integrate a 512K x 18,  
256K x 32, or 256K x 36 SRAM core ꢁith advanced  
synchronous peripheral circuitry and a 2-bit burst  
counter. These SRAMs are optimized for 100 percent  
bus utilization, eliminating any turnaround cycles for  
READ to WRITE, or WRITE to READ, transitions. All  
synchronous inputs pass through registers controlled  
by a positive-edge-triggered single clock input ꢂCLK).  
The synchronous inputs include all addresses, all data  
inputs, chip enable ꢂCE#), tꢁo additional chip enables  
for easy depth expansion ꢂCE2, CE2#), cycle start input  
• Package  
100-pin TQFP  
T
F*  
165-pin, 13mm x 15mm FBGA  
• Operating Temperature Range  
Commercial ꢂ0ºC to +70ºC)  
Industrial ꢂ-40°C to +85°C)**  
None  
IT  
Part Number Example:  
MT55L256L32PT-7.5  
8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM  
MT55L512L18P_C.p65 – Rev. 2/02  
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.  
©2002,MicronTechnology,Inc.  
1

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