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MT44K16M36 PDF预览

MT44K16M36

更新时间: 2024-11-21 12:23:19
品牌 Logo 应用领域
镁光 - MICRON 动态存储器
页数 文件大小 规格书
111页 6205K
描述
576Mb: x18, x36 RLDRAM 3

MT44K16M36 数据手册

 浏览型号MT44K16M36的Datasheet PDF文件第2页浏览型号MT44K16M36的Datasheet PDF文件第3页浏览型号MT44K16M36的Datasheet PDF文件第4页浏览型号MT44K16M36的Datasheet PDF文件第5页浏览型号MT44K16M36的Datasheet PDF文件第6页浏览型号MT44K16M36的Datasheet PDF文件第7页 
Advance  
576Mb: x18, x36 RLDRAM 3  
Features  
RLDRAM 3  
MT44K32M18 – 2 Meg x 18 x 16 Banks  
MT44K16M36 – 1 Meg x 36 x 16 Banks  
Options1  
Marking  
Features  
• 1066 MHz DDR operation (2133 Mb/s/ball data  
rate)  
• 76.8 Gb/s peak bandwidth (x36 at 1066 MHz clock  
frequency)  
• Organization  
– 32 Meg x 18, and 16 Meg x 36 common I/O (CIO)  
– 16 banks  
• 1.2V center-terminated push/pull I/O  
• 2.5V VEXT, 1.35V VDD, 1.2V VDDQ I/O  
• Reduced cycle time (tRC (MIN) = 8 - 12ns)  
• SDR addressing  
• Clock cycle and tRC timing  
– 0.93ns and tRC (MIN) = 8ns  
(RL3-2133)  
-093E  
-093  
– 0.93ns and tRC (MIN) = 10ns  
(RL3-2133)  
– 1.07ns and tRC (MIN) = 8ns  
(RL3-1866)  
-107E  
-107  
– 1.07ns and tRC (MIN) = 10ns  
(RL3-1866)  
– 1.25ns and tRC (MIN) = 10ns  
(RL3-1600)  
-125E  
-125  
– 1.25ns and tRC (MIN) = 12ns  
(RL3-1600)  
• Programmable READ/WRITE latency (RL/WL) and  
burst length  
• Configuration  
• Data mask for WRITE commands  
• Differential input clocks (CK, CK#)  
• Free-running differential input data clocks (DKx,  
DKx#) and output data clocks (QKx, QKx#)  
• On-die DLL generates CK edge-aligned data and  
differential output data clock signals  
• 64ms refresh (128K refresh per 64ms)  
• 168-ball FBGA package  
40Ω or 60Ω matched impedance outputs  
• Integrated on-die termination (ODT)  
• Single or multibank writes  
• Extended operating range (200–1066 MHz)  
• READ training register  
– 32 Meg x 18  
– 16 Meg x 36  
• Operating temperature  
– Commercial (TC = 0° to +95°C)  
– Industrial (TC = –40°C to +95°C)  
• Package  
– 168-ball FBGA  
– 168-ball FBGA (Pb-free)  
• Revision  
32M18  
16M36  
None  
IT  
PA  
RB  
:A  
1. Not all options listed can be combined to  
define an offered product. Use the part cat-  
alog search on www.micron.com for availa-  
ble offerings.  
Note:  
• Multiplexed and non-multiplexed addressing capa-  
bilities  
• Mirror function  
• Output driver and ODT calibration  
• JTAG interface (IEEE 1149.1-2001)  
PDF: 09005aef84003617  
576mb_rldram3.pdf – Rev. B 1/12 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
1
© 2011 Micron Technology, Inc. All rights reserved.  
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by  
Micron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications.  

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