134b: x32 Automotive LPDDR2 SDRAM
Features
Automotive LPDDR2 SDRAM
MT42L16M32D1
Options
Marking
Features
• Ultra low-voltage core and I/O power supplies
– VDD2 = 1.14–1.30V
– VDDCA/VDDQ = 1.14–1.30V
– VDD1 = 1.70–1.95V
• Clock frequency range
– 533–10 MHz (data rate range: 1066–20 Mb/s/pin)
• Four-bit prefetch DDR architecture
• Eight internal banks for concurrent operation
• Multiplexed, double data rate, command/address
inputs; commands entered on every CK edge
• Bidirectional/differential data strobe per byte of
data (DQS/DQS#)
• Programmable READ and WRITE latencies (RL/WL)
• Programmable burst lengths: 4, 8, or 16
• Per-bank refresh for concurrent operation
• On-chip temperature sensor to control self refresh
rate (SR not supported >105°C)
• VDD2: 1.2V
L
• Configuration
– 4 Meg x 32 x 4 banks
• Device type
– LPDDR2-S4, 1 die in package
• FBGA “green” package
– 134-ball FBGA
(10mm x 11.5mm)
• Timing – cycle time
– 1.875ns @ RL = 8
• Special options
16M32
D1
HE
-18
A
– Automotive grade (Package-level
burn-in)
• Operating temperature range1
– From –40°C to +105°C
– From –40°C to +125°C
• Revision
AT
UT2
E
• Partial-array self refresh (PASR)
1. When TC >105°C, self refresh mode is not
available.
2. UT option use based on automotive usage
model. Contact Micron sales representative
with questions.
Notes:
• Deep power-down mode (DPD)
• Selectable output drive strength (DS)
• Clock stop capability
• RoHS-compliant, “green” packaging
• AEC-Q100
Table 1: Key Timing Parameters
Speed
Grade
Clock Rate
(MHz)
Data Rate
(Mb/s/pin)
RL
WL
-18
533
1066
8
4
Table 2: S4 Configuration Addressing
Architecture
16 Meg x 32
Die configuration
Row addressing
Column addressing
Number of die
4 Meg x 32 x 4 banks
8K (A[12:0])
512 (A[8:0])
1
1
1
Die per rank
Ranks per channel1
1. A channel is a complete LPDRAM interface, including command/address and data pins.
Note:
CCM005-196791117-10296
u07m_lpddr2_auto_at_ut.pdf - Rev. D 07/2020 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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1
Products and specifications discussed herein are subject to change by Micron without notice.