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MT35XU01GBBA2G12-0SIT PDF预览

MT35XU01GBBA2G12-0SIT

更新时间： 2024-03-03 10:09:00
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镁光 - MICRON /
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10页 189K
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MT35XU01GBBA

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MT35XU01GBBA2G12-0SIT 数据手册

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‡
Preliminary  
Xccela™ Flash Memory Data Sheet Brief  
Features  
Xccela™ Flash Memory Data Sheet Brief  
MT35X 1.8/3V, Octal I/O, 4KB/32KB/128KB Sector Erase  
Options  
Marking  
Features  
• SPI-compatible Xccela™ bus interface  
– Octal DDR protocol  
– Extended-SPI protocol with octal commands  
• Single and double transfer rate (SDR/DDR)  
• Clock frequency:  
– 166 MHz (MAX) in SDR (166 MB/s) (1.8V)  
– 200 MHz (MAX) in DDR (400 MB/s) with DQS  
(1.8V)  
• Voltage  
– 1.7–2.0V  
– 2.7–3.6V  
• Density  
– 256Mb  
– 512Mb  
– 1Gb  
– 2Gb  
• Device stacking  
– Monolithic  
– 2 die stacked  
– 4 die stacked  
• Device Generation  
• Die revision  
• Configuration  
– Boot in SDR x1  
– Boot in DDR x8  
• Sector Size  
U
L
256  
512  
01G  
02G  
– 133 MHz (MAX) in SDR (133 MB/s) (3.0V)  
– 133 MHz (MAX) in DDR (266MB/s) with DQS  
(3.0V)  
A
B
C
B
A
• Execute-in-place (XIP)  
• PROGRAM/ERASE SUSPEND operations  
• Volatile and nonvolatile configuration settings  
• Software reset  
• Reset pin available  
• 3-byte and 4-byte address modes – enable memory  
access beyond 128Mb  
• Dedicated 64-byte OTP area outside main memory  
– Readable and user-lockable  
– Permanent lock with PROGRAM OTP command  
• Erase capability  
– Bulk erase for monolithic, die erase for stacked  
devices  
– Sector erase 128KB uniform granularity  
– Subsector erase 4KB, 32KB granularity  
• Security and write protection  
1
2
– 128KB  
G
12  
0
• Packages: JEDEC-standard, RoHS-com-  
pliant  
– 24-ball T-PBGA 05/6mm x 8mm  
(5 x 5 array)  
• Security features  
– Standard security  
• Special options  
– Standard  
S
A
– Automotive  
– Volatile and nonvolatile locking and software  
write protection for each 128KB sector  
– Nonvolatile configuration locking and password  
protection  
– Protection management register offering en-  
hanced security features  
• Operating temperature range  
– From –40°C to +85°C  
– From –40°C to +105°C  
– From –40°C to +125°C  
IT  
AT  
UT  
– Hardware write protection: nonvolatile bits  
(BP[3:0] and TB) define protected area size  
– Program/erase protection during power-up  
– CRC detects accidental changes to raw data  
• Electronic signature  
– JEDEC-standard 3-byte signature  
– Extended device ID: two additional bytes identify  
device factory options  
• JESD47I-compliant  
– Minimum 100,000 ERASE cycles per sector  
– Data retention: 20 years (TYP)  
CCMTD-1718347970-10442  
Xccela_summary– Rev. A 04/18  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
© 2018 Micron Technology, Inc. All rights reserved.  
1
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by  
Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.  
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