MT352
COFDM Demodulator
Data Sheet
February 2005
Features
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Nordig II and ETSI 300 744 compliant
Ordering Information
MT352/CG/GP1N 64 Pin LQFP Trays
Superior Single Frequency Network performance
Unique active Impulse-Noise filtering
Single SAW operation
MT352/CG/GP1Q 64 Pin LQFP Tape & Reel
MT352/CG/GP2Q
MT352/CG/GP2N
64 Pin LQFP* Tape & Reel
64 Pin LQFP* Trays
Automatic co-channel and adjacent-channel
* Pb Free Matte Tin
0oC to +70oC
interference suppression
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Clock generation from single low-cost 20.48 MHz
crystal or external 4 or 27 MHz clock
IF sampling at 4.57, 36.17 or 43.5 MHz from a
Zarlink evaluation kits include application board, TNIM
and supporting software based on industry standard
operating systems. Device drivers are also available
enabling rapid product development and reduction in
time to market.
single crystal frequency
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Channel bandwidth of 6, 7 & 8 MHz
Blind acquisition capability (including 2 K / 8 K
mode detect)
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Automatic spectral inversion detection
Fast auto-scan and acquisition technology
Very low software overhead
Description
MT352 is
a
superior third generation Coded
Dual AGC control option
Orthogonal Frequency Division Multiplex (COFDM)
television demodulator that is both Nordig II and DVB
(as defined in ETS 300 744 specification) compliant. It
can be used in either 2 K or 8 K modes with 6, 7 or
8 MHz channels and is capable of addressing all
modes of transmission.
Access to channel SNR, pre- and post-Viterbi bit
error rates
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Compact 64 pin LQFP
Less than 0.22 W power consumption
Standby and sleep options
The device includes a high performance 10-bit A/D
converter capable of accepting direct IF at 36.17 or
43.75 MHz. Sampling rates required for both these
frequencies in 6,7 or 8 MHz OFDM channels can be
Applications
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Set-top boxes
Integrated digital televisions
Personal video recorders
Terrestrial PC reception
Mobile and portable applications
generated from
a
single 20.48 MHz crystal.
Alternatively, there is provision to replace this crystal
with a 4 or 27 MHz external clock input.
ADC
AGC
IF to
RF in
Pilot &
Channel
Processor
Symbol & Bit
De-interleaver
& Demapper
Baseband
conversion &
Interpolator
FFT
FEC
MPEG
TS
Symbol,
Carrier &
Timing
Impulse
Suppression
Primary
2-wire bus
Recovery
Secondary
2-wire bus
Control
engine
Tuner control
Figure 1 - Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.