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MT16VDDT12864AY-265 PDF预览

MT16VDDT12864AY-265

更新时间: 2024-09-17 00:36:43
品牌 Logo 应用领域
镁光 - MICRON 时钟动态存储器双倍数据速率光电二极管内存集成电路
页数 文件大小 规格书
35页 875K
描述
DDR SDRAM UNBUFFERED DIMM

MT16VDDT12864AY-265 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:DIMM, DIMM184Reach Compliance Code:compliant
风险等级:5.75最长访问时间:0.75 ns
最大时钟频率 (fCLK):133 MHzI/O 类型:COMMON
JESD-30 代码:R-PDMA-N184内存密度:8589934592 bit
内存集成电路类型:DDR DRAM MODULE内存宽度:64
端子数量:184字数:134217728 words
字数代码:128000000最高工作温度:70 °C
最低工作温度:组织:128MX64
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:DIMM封装等效代码:DIMM184
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
电源:2.5 V认证状态:Not Qualified
刷新周期:8192最大待机电流:0.08 A
子类别:DRAMs最大压摆率:4.48 mA
标称供电电压 (Vsup):2.5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:NO LEAD端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

MT16VDDT12864AY-265 数据手册

 浏览型号MT16VDDT12864AY-265的Datasheet PDF文件第2页浏览型号MT16VDDT12864AY-265的Datasheet PDF文件第3页浏览型号MT16VDDT12864AY-265的Datasheet PDF文件第4页浏览型号MT16VDDT12864AY-265的Datasheet PDF文件第5页浏览型号MT16VDDT12864AY-265的Datasheet PDF文件第6页浏览型号MT16VDDT12864AY-265的Datasheet PDF文件第7页 
256MB, 512MB, 1GB, 2GB (x64, DR)  
184-PIN DDR SDRAM UDIMM  
MT16VDDT3264A – 256MB  
MT16VDDT6464A – 512MB  
DDR SDRAM  
UNBUFFERED DIMM  
MT16VDDT12864A – 1GB  
MT16VDDT25664A – 2GB (ADVANCE)  
For the latest data sheet, please refer to the MicronWeb  
site: www.micron.com/products/modules  
Fe a t u re s  
Fig u re 1: 184-Pin DIMM (MO-206)  
• 184-pin, dual in-line memory module (DIMM)  
• Fast data transfer rates: PC2100 or PC2700  
• Utilizes 266 MT/ s and 333 MT/ s DDR SDRAM  
components  
Standard 1.25in. (31.75mm)  
• 256MB (32 Meg x 64), 512MB (64 Meg x 64), 1GB  
(128 Meg x 64), and 2GB (256 Meg x 64)  
• VDD = VDDQ = +2.5V  
Low-Profile 1.15in. (29.21mm)  
• VDDSPD = +2.3V to +3.6V  
• 2.5V I/ O (SSTL_2 compatible)  
• Com m ands entered on each positive CK edge  
• DQS edge-aligned with data for READs; center-  
aligned with data for WRITEs  
• Internal, pipelined double data rate (DDR)  
architecture; two data accesses per clock cycle  
• Bidirectional data strobe (DQS) transmitted/  
received with data—i.e., source-synchronous data  
capture  
OPTIONS  
MARKING  
• Package  
G
Y
184-pin DIMM (standard)  
• Differential clock inputs (CK and CK#)  
• Four internal device banks for concurrent operation  
• Program m able burst lengths: 2, 4, or 8  
Auto precharge option  
Auto Refresh and Self Refresh Modes  
• 15.6µs (256MB), 7.8125µs (512MB, 1GB, and 2GB)  
m axim um average periodic refresh interval  
• Serial Presence Detect (SPD) with EEPROM  
• Programmable READ CAS latency  
• Gold edge contacts  
184-pin DIMM (lead-free)1  
• Memory Clock, Speed, CAS Latency2  
-335  
-262  
-26A  
-265  
6ns/ 166MHz (333 MT/ s)  
CL = 2.5  
1
7.5ns/ 133 MHz (266 MT/ s) CL = 2  
7.5ns/ 133 MHz (266 MT/ s) CL = 2  
7.5ns/ 133 MHz (266 MT/ s) CL = 2.5  
1
• PCB  
See page 2 note  
See page 2 note  
Standard 1.25in. (31.75mm)  
Low-Profile 1.20in. (30.48mm)  
NOTE: 1. Consult Micron for product availability.  
2. CL = CAS (READ) Latency.  
Ta b le 1:  
Ad d re ss Ta b le  
256MB  
512MB  
1GB  
2GB  
4K  
8K  
8K  
8K  
Refresh Count  
4K (A0–A11)  
4 (BA0, BA1)  
8K (A0–A12)  
4 (BA0, BA1)  
8K (A0–A12)  
4 (BA0, BA1)  
16K (A0–A13)  
4 (BA0, BA1)  
1Gb (128 Meg x 8)  
2K (A0–A9, A11)  
2 (S0#, S1#)  
Row Addressing  
Device Bank Addressing  
Device Configuration  
Column Addressing  
Module Rank Addressing  
128Mb (16 Meg x 8) 256Mb (32 Meg x 8) 512Mb (64 Meg x 8)  
1K (A0–A9)  
2 (S0#, S1#)  
1K (A0–A9)  
2 (S0#, S1#)  
2K (A0–A9, A11)  
2 (S0#, S1#)  
pdf: 09005aef80739fa5, source: 09005aef807397e5  
DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN  
1
©2004 Micron Technology, Inc.  
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY  
MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.  

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