256MB, 512MB (x64, DR)
144-PIN SDRAM SODIMM
MT16LSDF3264(L)H – 256MB
MT16LSDF6464(L)H – 512MB
For the latest data sheet, please refer to the Micron® Web
site: www.micron.com/products/modules
SMALL-OUTLINE
SDRAM MODULE
Features
Figure 1: 144-Pin SODIMM (MO-190)
•
PC100- and PC133-compliant, 144-pin, small-
outline, dual in-line memory module (SODIMM)
Utilizes 100 MHz and 133 MHz SDRAM components
Unbuffered
PCB height: 1.25in (31.75mm)
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•
•
•
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256MB (32 Meg x 64) and 512MB (64 Meg x 64)
Single +3.3V power supply
Fully synchronous; all signals registered on positive
edge of system clock
•
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Internal pipelined operation; column address can
be changed every clock cycle
Internal SDRAM banks for hiding row access/
precharge
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•
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Programmable burst lengths: 1, 2, 4, 8, or full page
Auto precharge and auto refresh modes
Self refresh mode: standard and low-power
256MB module: 64ms, 4,096-cycle refresh (15.625µs
refresh interval); 512MB: 64ms, 8,192-cycle refresh
(7.81µs refresh interval)
LVTTL-compatible inputs and outputs
Serial presence-detect (SPD)
Gold edge connectors
Options
Marking
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•
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Self refresh current
Standard
Low power
Package
144-pin SODIMM (standard)
144-pin SODIMM (lead-free)
Memory Clock/CL
7.5ns (133 MHz)/CL = 2
7.5ns (133 MHz)/CL = 3
10ns (100 MHz)/CL = 2
PCB
None
1
L
•
•
•
G
1
Y
Table 1:
CL = CAS (READ) latency
Timing Parameters
-13E
-133
-10E
ACCESS TIME
MARKING FREQUENCY CL = 2 CL = 3 TIME TIME
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MODULE
CLOCK
SETUP HOLD
Height 1.25in (31.75mm)
See page 2 note
-13E
-133
-10E
133 MHz
133 MHz
100 MHz
5.4ns
–
–
5.4ns
–
1.5ns 0.8ns
1.5ns 0.8ns
NOTE: 1. Contact Micron for product availability.
6ns
2ns
1ns
Table 2:
Address Table
256MB
512MB
4K
8K
Refresh count
Device banks
Device configuration
Row addressing
Column addressing
Module ranks
4 (BA0, BA1)
128Mb (16 Meg x 8)
4K (A0–A11)
1K (A0–A9)
4 (BA0, BA1)
256Mb (32 Meg x 8)
8K (A0–A12)
1K (A0–A9)
2 (S0#, S1#)
2 (S0#, S1#))
pdf: 09005aef807924d2, source: 09005aef807924f1
SDF16C32_64x64HG.fm - Rev. E 4/06 EN
1
©2006 Micron Technology, Inc. All rights reserved.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.