Datasheet > MSM832TLI-85

MSM832TLI-85

更新时间： 2024-12-01 04:32:43

品牌	Logo	应用领域
MOSAIC		静态存储器
页数	文件大小	规格书
10页	138K
描述
Standard SRAM, 32KX8, 85ns, CMOS, CDIP28, SKINNY, DIP-28

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数据手册

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MSM832TLI-85 数据手册

MSM832-70/85/10

ISSUE 4.4:November1998

32K x 8 SRAM

MSM832 - 70/85/10

11403 West Bernado Court, Suite 100, San Diego, CA 92127.

Tel No: (619) 674 2233, Fax No: (619) 674 2230

Issue 4.4 : Nov 1998

32,768 x 8 CMOS Static RAM

Description

Features

The MSM832 is a Static RAM organised as 32K x

8 available with access times of 70,85 or 100 ns.

Thedeviceisavailableinfiveceramicpackage

options including the high denisty VIL™ package.

It features completely static operation with a low

power standby mode and is 3.0V battery back-up

compatible. It is directly TTL compatible and has

common data inputs and outputs.

• Fast Access Times of 70/85/100 ns.

• JEDECStandardfootprint.

• Low Power Operation : 385 mW (max)

• Low Power Standby : 1.1 mW (max) -L version.

• LowVoltageDataRetention.

• DirectlyTTLcompatible.

The device may be screened in accordance with

MIL-STD-883.

• Completely Static Operation.

Block Diagram

Pin Definitions

VCC

27 WE

A14

A12

A13

Row

Memory Array

A11

A10

Address

Decoder

Buffer

512 X 512

TOP VIEW

PACKAGE

V,T,S

A12

A13

A14

GND

Column I/O

I/O

Buffer

Column Decoder

Y Address Buffer

29 A8

28 A9

27 A11

26 NC

25 OE

24 A10

23 CS

22 D7

21 D6

J,W

PACKAGE

TOP VIEW

A1 10

A0 11

NC 12

D0 13

Package Details

PinFunctions

Pin Count

Description

Package Type

A0-A14

D0-7

Address inputs

0.1"Vertical-in-Line(VIL^TM)

0.3"Dual-in-line(SKINNYDIP)

0.6"Dual-in-Line(DIP)

J-LeadedChipCarrier(JLCC)

LeadlessChipCarrier(LCC)

DataInput/Output

Chip Select

OutputEnable

Write Enable

Power(+5V)

Ground

V_CC

GND

12 3 4 5 6 7...10

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MSM832TLMB-12	MOSAIC	获取价格	Standard SRAM, 32KX8, 120ns, CMOS, CDIP28, SKINNY, DIP-28
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