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MSM832JLMB-10 PDF预览

MSM832JLMB-10

更新时间: 2024-11-30 09:40:51
品牌 Logo 应用领域
MOSAIC 静态存储器内存集成电路
页数 文件大小 规格书
10页 138K
描述
Standard SRAM, 32KX8, 100ns, CMOS, CQCC32, JLCC-32

MSM832JLMB-10 数据手册

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32K x 8 SRAM  
MSM832 - 70/85/10  
11403 West Bernado Court, Suite 100, San Diego, CA 92127.  
Tel No: (619) 674 2233, Fax No: (619) 674 2230  
Issue 4.4 : Nov 1998  
32,768 x 8 CMOS Static RAM  
Description  
Features  
The MSM832 is a Static RAM organised as 32K x  
8 available with access times of 70,85 or 100 ns.  
Thedeviceisavailableinfiveceramicpackage  
options including the high denisty VIL™ package.  
It features completely static operation with a low  
power standby mode and is 3.0V battery back-up  
compatible. It is directly TTL compatible and has  
common data inputs and outputs.  
• Fast Access Times of 70/85/100 ns.  
• JEDECStandardfootprint.  
• Low Power Operation : 385 mW (max)  
• Low Power Standby : 1.1 mW (max) -L version.  
• LowVoltageDataRetention.  
• DirectlyTTLcompatible.  
The device may be screened in accordance with  
MIL-STD-883.  
• Completely Static Operation.  
Block Diagram  
Pin Definitions  
VCC  
27 WE  
1
2
3
28  
A14  
A12  
A7  
A3  
A4  
26  
A13  
X
Row  
Memory Array  
25  
24  
23  
22  
21  
20  
19  
18  
4
5
6
7
8
9
10  
11  
12  
13  
14  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
D0  
A8  
A9  
A11  
OE  
A10  
CS  
D7  
D6  
A5  
A6  
A7  
Address  
Decoder  
Buffer  
512 X 512  
TOP VIEW  
PACKAGE  
V,T,S  
A8  
A12  
A13  
A14  
17  
D1  
D2  
GND  
D5  
D4  
D3  
D0  
D7  
Column I/O  
16  
15  
I/O  
Buffer  
Column Decoder  
Y Address Buffer  
WE  
OE  
CS  
29 A8  
A6  
A5  
A4  
A3  
A2  
5
6
7
8
9
28 A9  
27 A11  
26 NC  
25 OE  
24 A10  
23 CS  
22 D7  
21 D6  
J,W  
PACKAGE  
TOP VIEW  
A1 10  
A0 11  
NC 12  
D0 13  
Package Details  
PinFunctions  
Pin Count  
Description  
Package Type  
A0-A14  
D0-7  
CS  
Address inputs  
28  
28  
28  
32  
32  
0.1"Vertical-in-Line(VILTM)  
0.3"Dual-in-line(SKINNYDIP)  
0.6"Dual-in-Line(DIP)  
J-LeadedChipCarrier(JLCC)  
LeadlessChipCarrier(LCC)  
V
T
S
J
W
DataInput/Output  
Chip Select  
OutputEnable  
Write Enable  
Power(+5V)  
Ground  
OE  
WE  
VCC  
GND  
1

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