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MSM8129JXM-12 PDF预览

MSM8129JXM-12

更新时间: 2024-11-26 04:28:59
品牌 Logo 应用领域
MOSAIC 静态存储器
页数 文件大小 规格书
9页 299K
描述
Standard SRAM, 128KX8, 120ns, CMOS, CQCC32, LCC-32

MSM8129JXM-12 数据手册

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128K x 8 SRAM  
MSM8129 - 70/85/10/12  
11403 West Bernado Court, Suite 100, San Diego, CA 92127.  
Tel No: (001) 858 674 2233, Fax No: (001) 858 674 2230  
Issue 1.0 : February 2000  
Description  
131,072 x 8 CMOS Static RAM  
Features  
Access Times of 70/85/100/120 ns  
Standard Dual CS footprint.  
The MSM8129 is a 1Mbit monolithic SRAM  
organised as 128K x 8. It is currently available in  
JLCC package, with access times of 70, 85,  
100, 120ns. It has a low power standby version  
and has 3.0V battery backup capability. It is  
directly TTL compatible and has common data  
inputs and outputs.  
Two pinout variants (single and dual CS) are  
available.  
All versions may be screened in accordance with  
MIL-STD-883.  
Operating Power  
550 mW (max)  
Low Power Standby (-L) 2.2 mW (max)  
Low Voltage Data Retention.  
Completely Static Operation  
Directly TTL compatible.  
May be processed in accordance with MIL-STD-883  
Block Diagram  
Pin Definition  
D1  
D2  
4
3
2
A12  
A14  
A16  
NC  
14  
15  
16  
17  
18  
19  
20  
MEMORY ARRAY  
512 X 2048  
GND  
D3  
TOP VIEW  
J
1
D4  
VCC  
A15  
CS2  
32  
31  
30  
D5  
D6  
D1  
4
A12  
14  
15  
16  
17  
18  
19  
20  
A14  
A16  
NC  
D2  
GND  
D3  
3
2
TOP VIEW  
JX  
1
D4  
VCC  
A15  
NC  
32  
31  
30  
D5  
D6  
Pin Functions  
A0~A16  
D0-7  
CS1  
CS2  
OE  
Address Inputs  
Package Details  
Data Input/Output  
Chip Select 1  
Chip Select 2  
Output Enable  
Write Enable  
No Connect  
Power (+5V)  
Ground  
Pin Count  
Description  
Package Type  
32  
J-Leaded Chip Carrier (JLCC)  
J
WE  
NC  
VCC  
GND  
Package details on pages 9.  

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获取价格

Standard SRAM, 128KX8, 20ns, CMOS, CQCC32, CERAMIC, LCC-32