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MSM518221-40ZS PDF预览

MSM518221-40ZS

更新时间: 2024-09-25 22:35:19
品牌 Logo 应用领域
冲电气 - OKI 存储内存集成电路
页数 文件大小 规格书
16页 182K
描述
262,214-Word x 8-Bit Field Memory

MSM518221-40ZS 技术参数

生命周期:Transferred零件包装代码:ZIP
包装说明:ZIP,针数:28
Reach Compliance Code:unknownHTS代码:8542.32.00.71
风险等级:5.22Is Samacsys:N
其他特性:INTERNAL 512 ROWS X 512 COLUMN X 8 BITS; SELF REFRESHJESD-30 代码:R-PZIP-T28
长度:36 mm内存密度:2097152 bit
内存集成电路类型:MEMORY CIRCUIT内存宽度:8
功能数量:1端子数量:28
字数:262144 words字数代码:256000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:ZIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
座面最大高度:10.16 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:1.27 mm端子位置:ZIG-ZAG
宽度:2.8 mmBase Number Matches:1

MSM518221-40ZS 数据手册

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E2L0032-17-Y1  
This version: Jan. 1998  
Previous version: Dec. 1996  
¡ Semiconductor  
MSM518221  
262,214-Word ¥ 8-Bit Field Memory  
DESCRIPTION  
The OKI MSM518221 is a high performance 2-Mbit, 256K ¥ 8-bit, Field Memory. It is designed for  
high-speedserialaccessapplicationssuchasHDTVs,conventionalNTSCTVs,VTRs,digitalmovies  
and Multi-media systems. The 2-Mbit capacity fits one field of a conventional NTSC TV screen.  
Each of the 8-bit planes has separate serial write and read ports. These employ independent control  
clockstosupportasynchronousreadandwriteoperations. Differentclockratesarealsosupported,  
which allow alternate data rates between write and read data streams.  
TheMSM518221provideshighspeedFIFO,First-InFirst-Out,operationwithoutexternalrefreshing:  
it refreshes its DRAM storage cells automatically, so that it appears fully static to the users.  
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial  
access operation, so that serial read and/or write control clock can be halted high or low for any  
durationaslongasthepowerison. Internalconflictsofmemoryaccessandrefreshingoperations  
are prevented by special arbitration logic.  
The MSM518221's function is simple, and similar to a digital delay device whose delay-bit-length is  
easily set by reset timing. The delay length, and the number of read delay clocks between write and  
read, is determined by externally controlled write and read reset timings.  
AdditionalSRAMserialregisters, orlinebuffersfortheinitialaccessof256¥8-bitenablehighspeed  
first-bit-access with no clock delay just after the write or read reset timings.  
TheMSM518221issimilarinoperationandfunctionalitytoOKI1-MbitFieldMemoryMSM514221B.  
Ithasawritemaskfunctionorinputenablefunction(IE), andread-dataskippingfunctionoroutput  
enablefunction(OE). Thedifferencesbetweenwriteenable(WE)andinputenable(IE),andbetween  
read enable (RE) and output enable (OE) are that WE and RE can stop serial write/read address  
increments, butIEandOEcannotstoptheincrement, whenwrite/readclockingiscontinuously  
appliedtoMSM518221.Theinputenable(IE)functionallowstheusertowriteintoselectedlocations  
of the memory only, leaving the rest of the memory contents unchanged. This facilitates data  
processing to display a "picture in picture" on a TV screen.  
1/16  

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