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MSC8102M4000 PDF预览

MSC8102M4000

更新时间: 2024-11-09 20:21:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
96页 1557K
描述
Digital Signal Processor, 16-Bit Size, 32-Ext Bit, 75MHz, CMOS, CBGA431, 20 X 20 MM, FLIP CHIP, CERAMIC, BGA-431

MSC8102M4000 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:FBGA, BGA431,21X21,32Reach Compliance Code:unknown
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
风险等级:5.83地址总线宽度:32
桶式移位器:NO位大小:16
边界扫描:YES最大时钟频率:75 MHz
外部数据总线宽度:32格式:FIXED POINT
内部总线架构:SINGLEJESD-30 代码:S-CBGA-B431
长度:20 mm低功率模式:YES
端子数量:431最低工作温度:-25 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:FBGA
封装等效代码:BGA431,21X21,32封装形状:SQUARE
封装形式:GRID ARRAY, FINE PITCH电源:1.6,3.3 V
认证状态:Not Qualified座面最大高度:3.22 mm
子类别:Digital Signal Processors最大供电电压:1.7 V
最小供电电压:1.55 V标称供电电压:1.6 V
表面贴装:YES技术:CMOS
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM宽度:20 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

MSC8102M4000 数据手册

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Technical Data  
MSC8102/D  
Rev. 6, 10/2003  
Quad Core 16-Bit  
Digital Signal Processor  
SC140  
Extended Core  
SC140  
Extended Core  
SC140  
Extended Core  
SC140  
Extended Core  
MQBus  
128  
128  
64  
SQBus  
Boot  
Local Bus  
ROM  
IP Master  
32 Timers  
M2  
The raw processing  
power of this highly  
integrated system-on-  
RAM  
Memory  
Controller*  
RS-232  
UART  
PLL/Clock  
JTAG Port  
4 TDMs  
GPIO  
GIC  
a-chip device enables  
developers to create  
next generation  
PLL  
GPIO Pins  
Interrupts  
IPBus  
32  
JTAG  
networking products  
that offer tremendous  
channel densities, while  
maintaining system  
flexibility, scalability,  
and upgradeability. The  
MSC8102 is offered in  
two core speed levels:  
250 and 275 MHz.  
8 Hardware  
Semaphores  
Internal Local Bus  
SIU  
64  
Direct  
Slave  
Interface  
(DSI)  
DSI Port  
32/64  
60x-compatible  
System Bus  
System  
Interface  
DMA  
Bridge  
Registers  
64  
Memory  
Controller*  
Internal System Bus  
32/64  
*There is a single memory controller that controls access to both the local bus and the system bus.  
Figure 1. MSC8102 Block Diagram  
What’s New?  
References to  
The MSC8102 is a highly integrated system-on-  
a-chip that combines four StarCore SC140  
extended cores with an RS-232 serial interface,  
four time-division multiplexed (TDM) serial  
interfaces, thirty-two general-purpose timers, a  
flexible system interface unit (SIU), and a  
multi-channel DMA engine. The four extended  
cores can deliver a total 4400 DSP MMACS  
performance at 275 MHz.  
Each core has four arithmetic logic units (ALUs),  
internal memory, a write buffer, and two interrupt  
controllers. The MSC8102 targets high-bandwidth  
highly computational DSP applications and is  
optimized for wireless transcoding and packet  
telephony as well as high-bandwidth base station  
applications. The MSC8102 delivers enhanced  
performance while maintaining low power  
dissipation and greatly reduces system cost.  
preliminary information  
were removed. A note  
was added to the DLLIN  
signal in Table 1-3.  
Specifications were  
updated in Table 2-2  
and Table 2-4,  
Additional information  
was signal connections  
for single master mode  
with the DLL disabled in  
Section 4.3. Numbers  
were added to the  
Ordering Information.  

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