MSC8101
Rev. 16, 11/2004
Freescale Semiconductor
Technical Data
MSC8101
Network Digital Signal Processor
CPM
SIU
The Freescale MSC8101
16-bit DSP is the first
member of the family of
DSPs based on the
StarCore SC140 DSP core.
The MSC8101 is available
in three core speed levels:
250, 275, and 300 MHz.
64-bit System Bus
Interrupt
3 × FCC
2 × MCC
4 × SCC
2 × SMC
SPI
MEMC
PIT
Controller
UTOPIA
Interface
64/32-bit
System
Bus
Timers
Parallel I/O
System Protection
Reset Control
Clock Control
MII
DMA
Engine
Baud Rate
Generators
•
•
•
SIC_EXT
SIC
Dual Ported
RAM
TDMs
Interrupts
{
Bridge
2 × SDMA
MEMC
I2C
RISC
64-bit Local Bus
128-bit QBus
Other
Peripherals
Extended Core
PIC
Q2PPC
Bridge
Interrupts
EFCOP
Address
Register
File
Data ALU
Register
File
Program
Sequencer
Boot
ROM
8/16-bit
Host
HDI16
Interface
Address
ALU
Data
ALU
What’s New?
Rev. 16 includes the following
changes:
SC140
Core
SRAM
512 KB
L1 Interface
JTAG
EOnCE™
•
Changed most REFCLK
references to DLLIN in
Section 2.7.4.
128-bit P-Bus
64-bit XA Data Bus
64-bit XB Data Bus
Power
Clock/PLL
Management
Figure 1. MSC8101 Block Diagram
The Freescale MSC8101 DSP is a very versatile device that integrates the high-performance SC140 four-ALU (arithmetic
logic unit) DSP core along with 512 KB of internal memory, a communications processor module (CPM), a 64-bit bus, a very
flexible System Integration Unit (SIU), and a 16-channel DMA engine on a single device. With its four-ALU core, the
MSC8101 can execute up to four multiply-accumulate (MAC) operations in a single clock cycle. The MSC8101 CPM is a 32-
bit RISC-based communications protocol engine that can network to time-division multiplexed (TDM) highways, Ethernet,
and asynchronous transfer mode (ATM) backbones. The MSC8101 60x-compatible bus interface facilitates its connection to
multi-master system architectures. The very large internal memory, 512 KB, reduces the need for external program and data
memories. The MSC8101 offers 1500 DSP MMACS (1200 core and 300 EFCOP) performance using an internal 300 MHz
clock with a 1.6 V core and independent 3.3 V input/output (I/O).
© Freescale Semiconductor, Inc., 2001, 2004. All rights reserved.