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MPIC2113P PDF预览

MPIC2113P

更新时间: 2024-11-27 22:29:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 驱动器MOSFET驱动器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
6页 174K
描述
HIGH AND LOW SIDE DRIVER

MPIC2113P 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
高边驱动器:YES接口集成电路类型:BUFFER OR INVERTER BASED MOSFET DRIVER
JESD-30 代码:R-PDIP-T14JESD-609代码:e0
长度:18.86 mm功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C标称输出峰值电流:2.5 A
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:15 V认证状态:Not Qualified
座面最大高度:4.69 mm子类别:MOSFET Drivers
最大供电电压:20 V最小供电电压:5 V
标称供电电压:15 V表面贴装:NO
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED断开时间:0.125 µs
接通时间:0.15 µs宽度:7.62 mm
Base Number Matches:1

MPIC2113P 数据手册

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Order this document  
by MPIC2113/D  
SEMICONDUCTOR TECHNICAL DATA  
Power Products Division  
HIGH AND LOW  
SIDE DRIVER  
The MPIC2113 is a high voltage, high speed, power MOSFET and IGBT driver  
with independent high and low side referenced output channels. Proprietary HVIC  
and latch immune CMOS technologies enable ruggedized monolithic construction.  
Logic inputs are compatible with standard CMOS or LSTTL outputs. The output  
drivers feature a high pulse current buffer stage designed for minimum driver  
cross–conduction. Propagation delays are matched to simplify use in high frequen-  
cy applications. The floating channel can be used to drive an N–channel power  
MOSFET or IGBT in the high side configuration which operates from 10 to 600  
volts.  
14  
1
P SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
Floating Channel Designed for Bootstrap Operation  
Fully Operational to +600 V  
Tolerant to Negative Transient Voltage  
dV/dt Immune  
16  
1
Gate Drive Supply Range from 10 to 20 V  
Undervoltage Lockout for Both Channels  
Separate Logic Supply  
DW SUFFIX  
PLASTIC PACKAGE  
CASE 751G–02  
SOIC – WIDE  
Operating Supply Range from 5 to 20 V  
Logic and Power Ground Operating Offset Range from –5 to +5 V  
CMOS Schmitt–triggered Inputs with Pull–down  
Cycle by Cycle Edge–triggered Shutdown Logic  
Matched Propagation Delay for Both Channels  
Outputs In Phase with Inputs  
ORDERING INFORMATION  
Device  
Package  
MPIC2113DW  
SOIC WIDE  
MPIC2113P  
PDIP  
PRODUCT SUMMARY  
V
OFFSET  
600 V MAX  
I
O+/–  
2 A/2 A  
V
OUT  
10 – 20 V  
120 & 94 ns  
10 ns  
t
(typical)  
on/off  
Delay Matching  
PIN CONNECTIONS  
(TOP VIEW)  
9
8
7
6
5
4
3
2
1
HO  
8
7
6
5
4
3
2
1
HO  
10  
11  
12  
13  
14  
15  
16  
V
B
S
9
V
V
V
DD  
B
V
V
DD  
10  
11  
12  
13  
14  
HIN  
SD  
S
HIN  
SD  
LIN  
V
CC  
V
LIN  
CC  
V
COM  
LO  
SS  
COM  
LO  
V
SS  
14 LEADS PDIP MPIC2113P  
16 LEADS SOIC (WIDE BODY)  
MPIC2113DW  
This document contains information on a new product. Specifications and information herein are subject  
to change without notice.  
Motorola, Inc. 1996  

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