3.3V 1:12 LVCMOS PLL Clock Generator
MPC9772
NRND
DATASHEET
NRND – Not Recommend for New Designs
The MPC9772 is a 3.3 V compatible, 1:12 PLL based clock generator targeted
for high performance low-skew clock distribution in mid-range to
high-performance networking, computing and telecom applications. With output
frequencies up to 240 MHz and output skews less than 250 ps the device meets
the needs of the most demanding clock applications.
MPC9772
Features
•
•
•
•
•
•
•
•
•
1:12 PLL Based Low-Voltage Clock Generator
3.3 V Power Supply
3.3 V 1:12 LVCMOS
PLL CLOCK GENERATOR
Internal Power-On Reset
Generates Cock Signals Up to 240 MHz
Maximum Output Skew of 250 ps
On-Chip Crystal Oscillator Clock Reference
Two LVCMOS PLL Reference Clock Inputs
External PLL Feedback Supports Zero-Delay Capability
Various Feedback and Output Dividers (See Applications Information
Section)
AE SUFFIX
52-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 848D-03
•
•
Supports Up to Three Individual Generated Output Clock Frequencies
Synchronous Output Clock Stop Circuitry for Each Individual Output for
Power Down Support
•
•
•
•
•
Drives Up to 24 Clock Lines
Ambient Temperature Range 0C to +70C
Pin and Function Compatible To the MPC972
52-Lead Pb-Free Package
NRND – Not Recommend for New Designs
Use replacement part ICS87972DYI-147
Functional Description
The MPC9772 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the
MPC9772 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The
reference clock frequency and the divider for the feedback path determine the VCO frequency. Both must be selected to match
the VCO frequency range. The MPC9772 features an extensive level of frequency programmability between the 12 outputs as
well as the output to input relationships, for instance 1:1, 2:1, 3:1, 3:2, 4:1, 4:3, 5:1, 5:2, 5:3, 5:4, 5:6, 6:1, 8:1, and 8:3.
The QSYNC output will indicate when the coincident rising edges of the above relationships will occur. The selectability of the
feedback frequency is independent of the output frequencies. This allows for very flexible programming of the input reference
versus output frequency relationship. The output frequencies can be either odd or even multiples of the input reference. In addi-
tion the output frequency can be less than the input frequency for applications where a frequency needs to be reduced by a non-
binary factor. The MPC9772 also supports the 180 phase shift of one of its output banks with respect to the other output banks.
The QSYNC outputs reflects the phase relationship between the QA and QC outputs and can be used for the generation of sys-
tem baseline timing signals.
The REF_SEL pin selects the internal crystal oscillator or the LVCMOS compatible inputs as the reference clock signal. Two
alternative LVCMOS compatible clock inputs are provided for clock redundancy support. The PLL_EN control selects the PLL
bypass configuration for test and diagnosis. In this configuration, the selected input reference clock is routed directly to the output
dividers bypassing the PLL. The PLL bypass is fully static and the minimum clock frequency specification and all other PLL char-
acteristics do not apply.
The outputs can be individually disabled (stopped in logic low state) by programming the serial CLOCK_STOP interface of the
MPC9772. The MPC9772 has an internal power-on reset.
The MPC9772 is fully 3.3 V compatible and requires no external loop filter components. All inputs (except XTAL) accept
LVCMOS signals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 transmission
lines. For series terminated transmission lines, each of the MPC9772 outputs can drive one or two traces giving the devices an
effective fanout of 1:24. The device is pin and function compatible to the MPC972 and is packaged in a 52-lead LQFP package.
MPC9772 REVISION 7 JANUARY 8, 2013
1
©2013 Integrated Device Technology, Inc.
5秒后页面跳转
SK海力士量产12层HBM3E，容量高达36GB
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
贸泽上架Tallysman TW5386智能GNSS天线
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
