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MPC958FAR2 PDF预览

MPC958FAR2

更新时间: 2024-09-23 14:43:43
品牌 Logo 应用领域
恩智浦 - NXP 驱动输出元件逻辑集成电路
页数 文件大小 规格书
5页 278K
描述
958 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7 MM, PLASTIC, LQFP-32

MPC958FAR2 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QFP包装说明:7 X 7 MM, PLASTIC, LQFP-32
针数:32Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.47
系列:958输入调节:DIFFERENTIAL
JESD-30 代码:S-PQFP-G32JESD-609代码:e0
长度:7 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:2功能数量:1
反相输出次数:端子数量:32
实输出次数:10最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
传播延迟(tpd):7 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.2 ns座面最大高度:1.6 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:7 mm
最小 fmax:100 MHzBase Number Matches:1

MPC958FAR2 数据手册

 浏览型号MPC958FAR2的Datasheet PDF文件第2页浏览型号MPC958FAR2的Datasheet PDF文件第3页浏览型号MPC958FAR2的Datasheet PDF文件第4页浏览型号MPC958FAR2的Datasheet PDF文件第5页 
Freescale Semiconductor, Inc.  
SEMICONDUCTOR TECHNICAL DATA  
ꢀꢁ ꢂ ꢁꢃ ꢁ ꢄꢅ  
Order this document  
by MPC958/D  
ꢀꢎ ꢏꢖ ꢗꢘ  
See Upgrade Product – MPC9658  
The MPC958 is a 3.3V compatible, PLL based clock driver device tar-  
geted for high performance clock tree designs. With output frequencies of  
up to 200MHz and output skews of 200ps the MPC958 is ideal for the  
most demanding clock tree designs. The devices employ a fully differen-  
tial PLL design to minimize cycle–to–cycle and phase jitter.  
Fully Integrated PLL  
LOW VOLTAGE  
PLL CLOCK DRIVER  
Output Frequency up to 200MHz  
Outputs Disable in High Impedance  
LQFP Packaging  
100ps Cycle–to–Cycle Jitter  
The MPC958 has a differential LVPECL reference input along with an  
external feedback input. These features make the MPC958 ideal for use  
as a zero delay, low skew fanout buffer. The device performance has  
been tuned and optimized for zero delay performance. The MR/OE input  
pin will tristate the output buffers when driven “high”.  
The MPC958 is fully 3.3V compatible and requires no external loop  
filter components. All control inputs accept LVCMOS or LVTTL compat-  
ible levels while the outputs provide LVCMOS levels with the ability to  
drive terminated 50transmission lines. For series terminated 50lines,  
each of the MPC958 outputs can drive two traces giving the device an  
effective fanout of 1:22. The device is packaged in a 7x7mm 32–lead  
LQFP package to provide the optimum combination of board density and  
performance.  
5
FA SUFFIX  
32–LEAD LQFP PACKAGE  
CASE 873A  
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ꢑ ꢂꢒ  
ꢓ ꢔꢔ ꢕ ꢖꢔ ꢔ ꢗꢘꢙ  
÷ꢓ  
÷ꢓ  
Figure 1. Logic Diagram  
Rev 1  
462  
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA  
For More Information On This Product,  
Go to: www.freescale.com  

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