MPC951FA

更新时间： 2024-09-23 13:01:39

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		时钟驱动器
页数	文件大小	规格书
13页	166K
描述
LVCMOS/LVTTL SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7 MM, PLASTIC, LQFP-32

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MPC951FA 技术参数

生命周期：	Transferred	零件包装代码：	QFP
包装说明：	LQFP,	针数：	32
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.46	其他特性：	WITH POWER-ON RESET; RESET & OUTPUT ENABLE ON THE SAME LINE; MEETS POWER PC SKEW REQUIREMENTS
系列：	LVCMOS/LVTTL	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G32	JESD-609代码：	e0
长度：	7 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
功能数量：	1	反相输出次数：
端子数量：	32	实输出次数：	9
最高工作温度：	70 °C	最低工作温度：
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	传播延迟（tpd）：	0.4 ns
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.75 ns
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	宽度：	7 mm
最小 fmax：	180 MHz	Base Number Matches：	1

MPC951FA 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MPC950/951 are 3.3V compatible, PLL based clock driver

devices targeted for high performance clock tree designs. With output

frequencies of up to 180MHz and output skews of 375ps the MPC950 is

ideal for the most demanding clock tree designs. The devices employ a

fully differential PLL design to minimize cycle–to–cycle and long term

jitter. This parameter is of significant importance when the clock driver is

providing the reference clock for PLL’s on board today’s microprocessors

and ASiC’s. The devices offer 9 low skew outputs, the outputs are

configurable to support the clocking needs of the various high

performance microprocessors.

LOW VOLTAGE

PLL CLOCK DRIVER

• Fully Integrated PLL

• Oscillator or Crystal Reference Input

• Output Frequency up to 180MHz

• Outputs Disable in High Impedance

• Compatible with PowerPC , Intel and High Performance RISC

Microprocessors

• TQFP Packaging

FA SUFFIX

32–LEAD TQFP PACKAGE

CASE 873A–02

• Output Frequency Configurable

• ±100ps Typical Cycle–to–Cycle Jitter

Two selectable feedback division ratios are available on the MPC950

to provide input reference clock flexibility. The FBSEL pin will choose

between a divide by 8 or a divide by 16 of the VCO frequency to be

compared with the input reference to the MPC950. The internal VCO is

running at either 2x or 4x the high speed output, depending on

configuration, so that the input reference will be either one half, one fourth

or one eighth the high speed output.

The MPC951 replaces the crystal oscillator and internal feedback of the MPC950 with a differential PECL reference input and

an external feedback input. These features allow for the MPC951 to be used as a zero delay, low skew fanout buffer. In addition,

the external feedback allows for a wider variety of input–to–output frequency relationships. The MPC951 REF_SEL pin allows for

the selection of an alternate LVCMOS input clock to be used as a test clock or to provide the reference for the PLL from an

LVCMOS source.

The MPC950 provides an external test clock input for scan clock distribution or system diagnostics. In addition the REF_SEL

pin allows the user to select between a crystal input to an on–board oscillator for the reference or to chose a TTL level oscillator

input directly. The on–board crystal oscillator requires no external components beyond a series resonant crystal.

Both the MPC950 and MPC951 are fully 3.3V compatible and require no external loop filter components. All inputs accept

LVCMOS or LVTTL compatible levels while the outputs provide LVCMOS levels with the capability to drive terminated 50Ω

transmission lines. Select inputs do not have internal pull–up/pull–down resistors and thus must be set externally. If the

PECL_CLK inputs are not used, they can be left open. For series terminated 50Ω lines, each of the MPC950/951 outputs can

drive two traces giving the device an effective fanout of 1:18. The device is packaged in a 7x7mm 32–lead TQFP package to

provide the optimum combination of board density and performance.

PowerPC is a trademark of International Business Machines Corporation. Pentium is a trademark of Intel Corporation.

2/97

REV 4

Motorola, Inc. 1997

12 3 4 5 6 7...13

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与MPC951FA相关器件

型号	品牌	获取价格	描述	数据表
MPC951FAR2	IDT	获取价格	PLL Based Clock Driver, 951 Series, 9 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
MPC952	MOTOROLA	获取价格	LOW VOLTAGE PLL CLOCK DRIVER
MPC952FA	NXP	获取价格	952 SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLAST
MPC952FA	IDT	获取价格	PLL Based Clock Driver, 952 Series, 11 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
MPC952FA	MOTOROLA	获取价格	LVCMOS/LVTTL SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP
MPC952FAR2	IDT	获取价格	PLL Based Clock Driver, 952 Series, 11 True Output(s), 0 Inverted Output(s), CMOS, PQFP32,
MPC953	MOTOROLA	获取价格	LOW VOLTAGE PLL CLOCK DRIVER
MPC953FAR2	MOTOROLA	获取价格	PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, 7 X 7 MM, PLASTIC,
MPC954DT	MOTOROLA	获取价格	MPC900 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24, TS
MPC954DT	NXP	获取价格	IC,1:10 OUTPUT,BIPOLAR,TSSOP,24PIN,PLASTIC

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