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MPC950FA PDF预览

MPC950FA

更新时间: 2024-09-23 21:11:23
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
12页 343K
描述
Processor Specific Clock Generator, 180MHz, CMOS, PQFP32, 7 X 7 MM, LQFP-32

MPC950FA 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.33
JESD-30 代码:S-PQFP-G32JESD-609代码:e0
长度:7 mm端子数量:32
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:180 MHz封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
宽度:7 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

MPC950FA 数据手册

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DATA SHEET  
MPC950  
Low Voltage PLL Clock Driver  
The MPC950 is a 3.3V compatible, PLL based clock driver device  
targeted for high performance clock tree designs. With output frequencies  
of up to 180MHz and output skews of 375ps the MPC950 is ideal for the  
most demanding clock tree designs. The devices employ a fully  
differential PLL design to minimize cycle–to–cycle and long term jitter.  
This parameter is of significant importance when the clock driver is  
providing the reference clock for PLL’s on board today’s microprocessors  
and ASiC’s. The devices offer 9 low skew outputs, the outputs are  
configurable to support the clocking needs of the various high  
performance microprocessors.  
LOW VOLTAGE  
PLL CLOCK DRIVER  
Fully Integrated PLL  
Oscillator or Crystal Reference Input  
Output Frequency up to 180MHz  
Outputs Disable in High Impedance  
Compatible with PowerPC , Intel and High Performance RISC  
FA SUFFIX  
32–LEAD LQFP PACKAGE  
CASE 873A–02  
Microprocessors  
LQFP Packaging  
Output Frequency Configurable  
±100ps Typical Cycle–to–Cycle Jitter  
Two selectable feedback division ratios are available on the MPC950  
to provide input reference clock flexibility. The FBSEL pin will choose  
between a divide by 8 or a divide by 16 of the VCO frequency to be  
compared with the input reference to the MPC950. The internal VCO is  
running at either 2x or 4x the high speed output, depending on  
configuration, so that the input reference will be either one half, one fourth  
or one eighth the high speed output.  
The MPC950 provides an external test clock input for scan clock distribution or system diagnostics. In addition the REF_SEL  
pin allows the user to select between a crystal input to an on–board oscillator for the reference or to chose a TTL level oscillator  
input directly. The on–board crystal oscillator requires no external components beyond a series resonant crystal.  
The MPC950 is fully 3.3V compatible and require no external loop filter components. All inputs accept LVCMOS or LVTTL  
compatible levels while the outputs provide LVCMOS levels with the capability to drive terminated 50transmission lines. Select  
inputs do not have internal pull–up/pull–down resistors and thus must be set externally. For series terminated 50lines, each of  
the MPC950 outputs can drive two traces giving the device an effective fanout of 1:18. The device is packaged in a 7x7mm  
32–lead LQFP package to provide the optimum combination of board density and performance.  
PowerPC is a trademark of International Business Machines Corporation. Pentium is a trademark of Intel Corporation.  
IDT™ Low Voltage PLL Clock Driver  
MPC950  
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc  
1

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