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MPC92439AC

更新时间： 2024-11-04 10:49:15

品牌	Logo	应用领域
艾迪悌 - IDT		时钟
页数	文件大小	规格书
15页	823K
描述
900MHz, Low Voltage, LVPECL Clock Syntheesizer

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MPC92439AC 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP, QFP32,.35SQ,32	针数：	32
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.29
JESD-30 代码：	S-PQFP-G32	JESD-609代码：	e3
长度：	7 mm	湿度敏感等级：	3
端子数量：	32	最高工作温度：	70 °C
最低工作温度：		最大输出时钟频率：	900 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装等效代码：	QFP32,.35SQ,32	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	260
电源：	3.3 V	主时钟/晶体标称频率：	20 MHz
认证状态：	Not Qualified	座面最大高度：	1.6 mm
子类别：	Clock Generators	最大压摆率：	110 mA
最大供电电压：	3.465 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.8 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	7 mm
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, OTHER	Base Number Matches：	1

MPC92439AC 数据手册

900MHz, Low Voltage,

LVPECL Clock Syntheesizer

MPC92439

DATA SHEET

The MPC92439 is a 3.3 V compatible, PLL based clock synthesizer targeted for high

performance clock generation in mid-range to high-performance telecom, networking and

computing applications. With output frequencies from 3.125 MHz to 900 MHz and the

support of differential LVPECL output signals the device meets the needs of the most

demanding clock applications.

900MHZ LOW VOLTAGE

CLOCK SYNTHESIZER

Features

•

3.125 MHz to 900 MHz synthesized clock output signal

Differential LVPECL output

LVCMOS compatible control inputs

On-chip crystal oscillator for reference frequency generation

Alternative LVCMOS compatible reference input

3.3V power supply

Fully integrated PLL

Minimal frequency overshoot

Serial 3-wire programming interface

Parallel programming interface for power-up

28-PLCC and 32-LQFP packaging

28-Lead and 32-lead Pb-free packages available

SiGe Technology

FN SUFFIX⁽¹⁾

28-LEAD PLCC PACKAGE

CASE 776-02

EI SUFFIX⁽²⁾

28-LEAD PLCC PACKAGE

CASE 776-02

Ambient temperature range 0°C to + 70°C

Pin and function compatible to the MC12439 and MPC9239

FA SUFFIX⁽¹⁾

32-LEAD LQFP PACKAGE

CASE 873A-03

Functional Description

The internal crystal oscillator uses the external quartz crystal as the basis of its frequency

reference. The frequency of the internal crystal oscillator or external reference clock signal is

multiplied by the PLL. The VCO within the PLL operates over a range of 400 to 900 MHz. Its

output is scaled by a divider that is configured by either the serial or parallel interfaces. The

crystal oscillator frequency f

termine the output frequency.

The feedback path of the PLL is internal. The PLL adjusts the VCO output frequency to

be M times the reference frequency by adjusting the VCO control voltage. Note that for

some values of M (either too high or too low) the PLL will not achieve phase lock. The PLL

will be stable if the VCO frequency is within the specified VCO frequency range (400 to 900

MHz). The M-value must be programmed by the serial or parallel interface.

AC SUFFIX⁽²⁾

32-LEAD LQFP PACKAGE

CASE 873A-03

, the PLL feedback-divider M and the PLL post-divider N de-

XTAL

K SUFFIX

32-LEAD VFQFN PACKAGE

Pb-FREE PACKAGE

The PLL post-divider N is configured through either the serial or the parallel interfaces,

and can provide one of four division ratios (1, 2, 4, or 8). This divider extends performance

of the part while providing a 50% duty cycle. The output driver is driven differentially from

the output divider, and is capable of driving a pair of transmission lines terminated 50Ω to

V_CC– 2.0V. The positive supply voltage for the internal PLL is separated from the power

supply for the core logic and output drivers to minimize noise induced jitter.

The configuration logic has two sections: serial and parallel. The parallel interface uses

the values at the M[6:0] and N[1:0] inputs to configure the internal counters. It is recom-

mended on system reset to hold the P_LOAD input LOW until power becomes valid. On the

LOW-to-HIGH transition of P_LOAD, the parallel inputs are captured. The parallel interface

has priority over the serial interface. Internal pullup resistors are provided on the M[6:0] and

N[1:0] inputs prevent the LVCMOS compatible control inputs from floating. The serial inter-

face centers on a twelve bit shift register. The shift register shifts once per rising edge of the

S_CLOCK input. The serial input S_DATA must meet setup and hold timing as specified in

the AC Characteristics section of this document. The configuration latches will capture the

Notes:

(1) FN, FA suffix: leaded terminations

(2) EI, AC suffix: lead-free, RoHS-compliant, EPP

ORDERING INFORMATION

Device

MPC92439EI

Package

PLCC-28 (Pb-Free)

LQFP-32

MPC92439FA

MPC92439AC

MPC92439KLF

LQFP-32 (Pb-Free)

P R O P O^VS^FQFE^N-32D^(Pb-Free)

value of the shift register on the HIGH-to-LOW edge of the S_LOAD input. See PROGRAMMING INTERFACE for more information. The TEST

output reflects various internal node values, and is controlled by the T[2:0] bits in the serial data stream. In order to minimize the PLL jitter, it

is recommended to avoid active signal on the TEST output. The PWR_DOWN pin, when asserted, will synchronously divide the FOUT by 16.

The power down sequence is clocked by the PLL reference clock, thereby causing the frequency reduction to happen relatively slowly. Upon

de-assertion of the PWR_DOWN pin, the FOUT input will step back up to its programmed frequency in four discrete increments.

MPC92439 REVISION 4 OCTOBER 27, 2009

12 3 4 5 6 7...15

中文翻译

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与MPC92439AC相关器件

型号	品牌	获取价格	描述	数据表
MPC92439ACR2	IDT	获取价格	Clock Generator, 900MHz, PQFP32, ROHS COMPLIANT, LQFP-32
MPC92439EI	IDT	获取价格	900MHz, Low Voltage, LVPECL Clock Syntheesizer
MPC92439EIR2	IDT	获取价格	Clock Generator, 900MHz, PQCC28, ROHS COMPLIANT, PLASTIC, LCC-28
MPC92439FA	IDT	获取价格	900MHz, Low Voltage, LVPECL Clock Syntheesizer
MPC92439FAR2	IDT	获取价格	Clock Generator, 900MHz, PQFP32, LQFP-32
MPC92439KLF	IDT	获取价格	900MHz, Low Voltage, LVPECL Clock Syntheesizer
MPC92469	IDT	获取价格	400 MHz Low Voltage PECL Clock Synthesizer w/Spread Spectrum
MPC92469AC	NXP	获取价格	400MHz, OTHER CLOCK GENERATOR, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LEAD FREE,
MPC92469AC	IDT	获取价格	TQFP-32, Tray
MPC92469ACR2	IDT	获取价格	Clock Generator, PQFP32

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