Datasheet > MPC5516S(144LQFP)

MPC5516S(144LQFP)

更新时间： 2024-11-26 20:59:23

品牌	Logo	应用领域
恩智浦 - NXP		PC
页数	文件大小	规格书
22页	147K
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MPC5516S(144LQFP)

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MPC5516S(144LQFP) 技术参数

生命周期：	Transferred	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.8
Base Number Matches：	1

MPC5516S(144LQFP) 数据手册

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Freescale Semiconductor

Product Brief

Document Number: MPC5510PB

Rev. 2, 5/2008

MPC5510 Family Product Brief

32-Bit Power Architecture™ Microcontrollers for Body

Electronics

Contents

The MPC5510 is a new family of next generation

microcontrollers built on the Power Architecture.

Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.1 Body Controller Application Example . . . . . . . . . . . 2

1.2 Gateway Application Example. . . . . . . . . . . . . . . . . 3

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2.1 MPC5510 Family Comparison. . . . . . . . . . . . . . . . . 3

2.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.3 Critical Performance Parameters . . . . . . . . . . . . . . 7

2.4 Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.5 Chip-Level Features . . . . . . . . . . . . . . . . . . . . . . . . 9

2.6 Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Developer Environment. . . . . . . . . . . . . . . . . . . . . . . . . . 21

This document describes the features of the family and

the options available on the devices in this family. It also

provides some important electrical and physical

characteristics of these devices.

The MPC5510 family of 32-bit microcontrollers is

Freescale Semiconductor’s latest achievement in

integrated automotive application controllers. It belongs

to an expanding family of automotive-focused products

designed to address the next wave of central body and

gateway applications within the vehicle. Freescale’s

advanced and cost efficient host processor core of the

MPC5510 automotive controller family is compatible

with the Power Architecture Book E architecture. It

operates at speeds up to 80 MHz and offers high

performance processing optimized for low-power

consumption. It capitalizes on the available development

infrastructure of the current Power Architecture devices

and will be supported with software drivers, operating

12 3 4 5 6 7...22

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