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MPC5516GMVL PDF预览

MPC5516GMVL

更新时间: 2024-11-01 20:41:59
品牌 Logo 应用领域
恩智浦 - NXP PC
页数 文件大小 规格书
2页 202K
描述
MPC5516GMVL

MPC5516GMVL 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:unknown风险等级:5.8
Base Number Matches:1

MPC5516GMVL 数据手册

 浏览型号MPC5516GMVL的Datasheet PDF文件第2页 
TM  
Power Architecture 32-bit Microcontroller  
MPC5510  
Combining high-performance  
and low-power for automotive  
body electronics  
System Integration  
VReg  
Crossbar Masters  
Debug  
JTAG  
Power  
Architecture™  
e200z1  
Nexus Class 2+  
The MPC5510 family is the first automotive  
32-bit microcontroller, built on Power  
Core  
Osc/PLL  
e200z0  
Core  
FlexRay™ Controller  
Architecture™ technology, featuring flexible  
low-power modes. This high-performance  
MCU inherits the single cycle access flash  
memory and advanced peripherals from  
the existing MPC5500 product families. It  
reuses the same proven 130 nm automotive  
flash technology and enjoys the outstanding  
development tools and software support built  
around the Power Architecture technology in  
automotive applications. The family approach  
offers scalability from low memory size, low  
pin count, reduced feature set devices up to  
80 MHz dual-core, 1 MB of embedded flash  
and 208 MAPBGA full featured derivatives.  
The MPC5510 aims at reducing the number  
of modules in the car cockpit area through  
higher integration of body electronics and  
gateway functions.  
eDMA  
MMU  
Interrupt Controller  
Crossbar Switch  
Memory Protection Unit (MPU)  
Boot Assist  
Module (BAM)  
External Bus  
(optional)  
Up to 64K  
SRAM  
I/O  
Bridge  
Up to 1 MB  
Flash  
Crossbar Slaves  
eMIOSLite  
16–24 ch.  
2–6  
FlexCAN  
3–6  
2–3  
1
16–40 ch.  
ATD  
eSCI  
DSPI  
I2C  
Applications  
• Central body controller  
Architecture  
Memory  
• Gateway  
• Power Architecture Book E-compliant 32-bit • Up to 1 MB of flash with Error Correction  
• Instrument cluster  
• Center stack display  
• Smart junction box  
e200z1 core with 16/32-bit Variable Length  
Encoding (VLE)  
Coding (ECC)  
• The flash module features Read While Write  
(RWW) and small partitions for optimal  
• Optional VLE-only e200z0 secondary core,  
subset of the e200z1 instruction set  
bootloader and EEPROM emulation support  
• 16-channel enhanced Direct Memory  
Access (eDMA)  
• Up to 64 KB of SRAM with ECC  
• Memory Protection Unit (MPU) with up to  
16 regions and 32-bytes granularity  
• Memory Management Unit (MMU) with  
4-entry translation look-aside buffer (TLB)  
• Multiple low-power modes  
• JTAG and Nexus Class 2+ debug support  

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Freescale 32-bit MCU, Power Arch, 1.5MB Flash, 80MHz, -40/+105degC, Automotive Grade, MAPB