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MP7529AJN PDF预览

MP7529AJN

更新时间: 2024-11-11 20:10:47
品牌 Logo 应用领域
艾科嘉 - EXAR 光电二极管转换器
页数 文件大小 规格书
12页 115K
描述
D/A Converter, 2 Func, Parallel, 8 Bits Input Loading, 0.2us Settling Time, PDIP20, 0.300 INCH, PLASTIC, DIP-20

MP7529AJN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, PLASTIC, DIP-20
针数:20Reach Compliance Code:unknown
风险等级:5.92最大模拟输出电压:10 V
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, 8 BITSJESD-30 代码:R-PDIP-T20
JESD-609代码:e0长度:25.21 mm
最大线性误差 (EL):0.3906%位数:8
功能数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:12/15 V
认证状态:Not Qualified座面最大高度:5.33 mm
最大稳定时间:标称安定时间 (tstl):0.2 µs
子类别:Other Converters最大压摆率:2 mA
标称供电电压:15 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

MP7529AJN 数据手册

 浏览型号MP7529AJN的Datasheet PDF文件第2页浏览型号MP7529AJN的Datasheet PDF文件第3页浏览型号MP7529AJN的Datasheet PDF文件第4页浏览型号MP7529AJN的Datasheet PDF文件第5页浏览型号MP7529AJN的Datasheet PDF文件第6页浏览型号MP7529AJN的Datasheet PDF文件第7页 
MP7529A  
15 V CMOS  
Dual Buffered Multiplying 8-Bit  
Digital-to-Analog Converter  
FEATURES  
BENEFITS  
Very Low Total Harmonic Distortion  
Lower Glitch Energy  
Quiet Operation in Audio Applications  
Easy Interface to Microprocessors  
Four Quadrant Multiplication  
On-Chip Latches for Both DACs  
+10.8 V to +15.75 V Operation  
Low Power Consumption  
TTL/5V CMOS Compatible  
Latch-Up Free  
Second Source to AD7628  
5 V Operation: MP7529B  
Data is transferred to either of the two D/A Converter latches  
via a common 8-bit TTL/5 V CMOS compatible input port. The  
control input DAC A/DAC B determines which DAC is to be  
loaded.  
GENERAL DESCRIPTION  
The MP7529A is a dual 8-bit Digital-to-Analog Converter  
featuring excellent DAC-to-DAC matching, tracking and  
specifically optimized for applications requiring low total  
harmonic distortion. The MP7529A is manufactured using  
advanced thin film resistors on a double metal CMOS process.  
The MP7529A incorporates a unique decoding technique  
yielding lower glitch energy, higher speed and excellent  
accuracy over temperature and time.  
The device isspecifiedforoperationfrom+10.8Vto+15.75V  
power supply, and is TTL-compatible over this range. Power  
dissipation is only 20 mW. Both DACs offer excellent four  
quadrant multiplication characteristics, and include separate  
reference inputs and feedback resistors. An improved latch-up  
resistant design eliminates the need for external protective  
Schottky diodes in most applications.  
SIMPLIFIED BLOCK AND TIMING DIAGRAM  
V
DD  
V
REFA  
DB7-DB0  
DAC A/DAC B  
R
FBA  
I
OUTA  
D
Q
DAC A  
DB7-DB0  
CS  
LATCH A  
DAC A/DAC B  
E
WR  
R
FBB  
OUT  
I
OUTB  
D
Q
DAC B  
LATCH B  
E
AGND  
CS  
WR  
DGND  
V
REFB  
Rev. 2.00  
1

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