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MP5006EQ-Z PDF预览

MP5006EQ-Z

更新时间: 2024-11-02 20:57:07
品牌 Logo 应用领域
芯源 - MPS 光电二极管
页数 文件大小 规格书
13页 355K
描述
Power Supply Support Circuit, Adjustable, 1 Channel, PDSO10, 3 X 3 MM, MO-229VEED-5, QFN-10

MP5006EQ-Z 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Not Recommended零件包装代码:SON
包装说明:QFN-10针数:10
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.17
可调阈值:YES模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:S-PDSO-N10长度:3 mm
信道数量:1功能数量:1
端子数量:10最高工作温度:85 °C
最低工作温度:-20 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVSON封装形状:SQUARE
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):10 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:OTHER端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm
Base Number Matches:1

MP5006EQ-Z 数据手册

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MP5006  
5V, 1A- 5A Programmable Current  
Limit Switch with Slew Rate Control and  
Auto Enable  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
The MP5006 is a protection device designed to  
protect circuitry on the output (VOUT) from  
transients on input (VIN). It also protects VIN from  
undesired shorts and transients coming from the  
load.  
Integrated 44mPower FET  
Enable/Fault Pin  
Adjustable Slew Rate for Output Voltage  
Adjustable Current Limit  
Automatic Startup/Retry after Thermal  
Protection  
At start up, inrush current is controlled by limiting  
the slew rate at the VOUT. The slew rate is  
controlled by a small capacitor at the dv/dt pin.  
The dv/dt pin has an internal circuit that allows  
the customer to float this pin (no connect) and  
Over Voltage Limit  
APPLICATIONS  
Hot Swap  
PC Cards  
Laptops  
SSD  
still receive a 1.1ms ramp time at the VOUT  
.
The max load at the output (VOUT) is current  
limited. This is accomplished by utilizing a sense  
FET topology. The magnitude of the current limit  
is controlled by an external resistor connected  
between the ILIMIT pins.  
HDD  
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks  
of Monolithic Power Systems, Inc.  
An internal charge pump drives the gate of the  
power device, allowing a very low on-resistance  
DMOS power FET of just 0.044.  
VOUT is protected from VIN being too low or too  
high. Under Voltage Lockout (UVLO) assures  
that the input is above the minimum operating  
threshold, before the power device is turned on.  
If VIN goes above the high output threshold, the  
output voltage will be limited.  
TYPICAL APPLICATION  
VIN  
11  
VIN  
6
5
+ILIMIT  
VOUT  
VOUT  
VOUT  
R
Limit  
4
7
8
-ILIMIT  
MP5006  
Enable/Fault  
3
2
1
EN  
VOUT  
VOUT  
VOUT  
9
dv/dt  
C
dv/dt  
(Optinal)  
10  
GND  
MP5006 Rev.0.92  
12/27/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
1

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