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MN6152S PDF预览

MN6152S

更新时间: 2024-02-20 07:56:35
品牌 Logo 应用领域
松下 - PANASONIC /
页数 文件大小 规格书
8页 47K
描述
Phase Locked Loop, CMOS, PDSO16, 0.225 INCH, PLASTIC, SOP-16

MN6152S 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SOP16,.25
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.74
Is Samacsys:N模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZER
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:6.5 mm功能数量:1
端子数量:16最高工作温度:60 °C
最低工作温度:-20 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2 V
认证状态:Not Qualified座面最大高度:1.85 mm
子类别:PLL or Frequency Synthesis Circuits最大供电电流 (Isup):2.5 mA
最大供电电压 (Vsup):2.5 V最小供电电压 (Vsup):1.8 V
标称供电电压 (Vsup):2 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.3 mm
Base Number Matches:1

MN6152S 数据手册

 浏览型号MN6152S的Datasheet PDF文件第2页浏览型号MN6152S的Datasheet PDF文件第3页浏览型号MN6152S的Datasheet PDF文件第4页浏览型号MN6152S的Datasheet PDF文件第5页浏览型号MN6152S的Datasheet PDF文件第6页浏览型号MN6152S的Datasheet PDF文件第7页 
For Communications Equipment  
MN6152U  
PLL LSI with Built-In Prescaler  
Overview  
Pin Assignment  
The MN6152U is a CMOS LSI for a phase-locked loop  
(PLL) frequency synthesizer with serial data input.  
It consists of a two-coefficient prescaler, variable  
frequency divider, phase comparator, and charge pump.  
It offers high-speed operation on a low power supply  
voltage (1.8 to 2.5 V) and low power consumption (5 mW  
for VDD=2.0 V, FIN=100 MHz).  
Other features include intermittent operation by the  
power save (PS) control signal and high-speed pull-in that  
rapidly corrects the phase differences occurring at the start  
of operation.  
XIN  
XOUT  
FV  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
OR  
OV  
LC  
VDD  
DOP  
VSS  
LD  
FR  
PS  
LE  
DATA  
CLK  
FIN  
Features  
Low power supply voltage: VDD=1.8 to 2.5V  
Low power consumption: 5mW (VDD=2.0V,  
FIN=100MHz)  
(TOP VIEW)  
SSOP016-P-0225  
High-speed operation:  
FIN=175MHz  
Frequency dividing ratios in reference frequency  
dividing stage: 5 to 131,071  
Frequency dividing ratios in comparator stage: 272 to  
262,143  
Lock detector output pin  
Two types of phase comparator output  
- Internal charge pump output  
- Output for external charge pump  
Output monitor pins for both comparator and refer-  
ence frequency dividing stages  

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