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MMRF1314H PDF预览

MMRF1314H

更新时间: 2024-11-07 01:12:23
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恩智浦 - NXP /
页数 文件大小 规格书
17页 473K
描述
RF Power LDMOS Transistors

MMRF1314H 数据手册

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Document Number: MMRF1314H  
Rev. 1, 1/2017  
NXP Semiconductors  
Technical Data  
MMRF1314H  
MMRF1314HS  
MMRF1314GS  
RF Power LDMOS Transistors  
High Ruggedness N--Channel  
Enhancement--Mode Lateral MOSFETs  
These RF power devices are designed for pulse applications operating at  
frequencies from 1200 to 1400 MHz. The devices are suitable for use in pulse  
applications and are ideal for use in high power military and commercial L--Band  
radar applications.  
1200–1400 MHz, 1000 W PEAK, 52 V  
AIRFAST RF POWER LDMOS  
TRANSISTORS  
Typical Performance: In 1200–1400 MHz reference circuit, V = 52 Vdc,  
DD  
I
= 100 mA  
DQ(A+B)  
Frequency  
(MHz)  
P
(W)  
G
η
D
out  
ps  
Signal Type  
(dB)  
15.5  
17.2  
17.0  
(%)  
47.5  
47.0  
46.5  
1200  
1300  
1400  
Pulse  
1130 Peak  
1170 Peak  
1000 Peak  
NI--1230H--4S  
MMRF1314H  
(128 μsec, 10% Duty Cycle)  
Load Mismatch/Ruggedness  
Frequency  
NI--1230S--4S  
MMRF1314HS  
P
(W)  
Test  
Voltage  
in  
Signal Type  
VSWR  
(MHz)  
Result  
(1)  
1400  
Pulse  
(128 μsec,  
10% Duty Cycle)  
> 20:1 at  
All Phase  
Angles  
31.6 Peak  
(3 dB  
Overdrive)  
52  
No Device  
Degradation  
1. Measured in 1400 MHz production test fixture.  
NI--1230GS--4L  
MMRF1314GS  
Features  
Internally input and output matched for broadband operation and ease of use  
Device can be used in a single--ended, push--pull or quadrature configuration  
Qualified up to a maximum of 52 VDD operation  
High ruggedness, handles > 20:1 VSWR  
Gate A  
Gate B  
Drain A  
Drain B  
3
4
1
2
Integrated ESD protection with greater negative gate--source voltage range  
for improved Class C operation and gate voltage pulsing  
Characterized with series equivalent large--signal impedance parameters  
Typical Applications  
Military and commercial L--Band radar systems  
(Top View)  
Note: The backside of the package is the  
source terminal for the transistor.  
Figure 1. Pin Connections  
© 2017 NXP B.V.  

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