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MM80C95N PDF预览

MM80C95N

更新时间: 2024-11-03 22:07:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 86K
描述
3-STATE Hex Buffers 3-STATE Hex Inverters

MM80C95N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.65
Is Samacsys:N控制类型:ENABLE HIGH
系列:CMOSJESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:19.305 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.0016 A位数:6
功能数量:1端口数量:2
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5/15 VProp。Delay @ Nom-Sup:100 ns
传播延迟(tpd):210 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

MM80C95N 数据手册

 浏览型号MM80C95N的Datasheet PDF文件第2页浏览型号MM80C95N的Datasheet PDF文件第3页浏览型号MM80C95N的Datasheet PDF文件第4页浏览型号MM80C95N的Datasheet PDF文件第5页浏览型号MM80C95N的Datasheet PDF文件第6页浏览型号MM80C95N的Datasheet PDF文件第7页 
October 1987  
Revised January 1999  
MM80C95 • MM80C97 • MM80C98  
3-STATE Hex Buffers • 3-STATE Hex Inverters  
General Description  
Features  
The MM80C95, MM80C97 and MM80C98 gates are mono-  
lithic complementary MOS (CMOS) integrated circuits con-  
structed with N- and P-channel enhancement mode  
transistors. The MM80C95 and the MM80C97 convert  
CMOS or TTL outputs to 3-STATE outputs with no logic  
inversion, the MM80C98 provides the logical opposite of  
the input signal. The MM80C95 has common 3-STATE  
controls for all six devices. The MM80C97 and the  
MM80C98 have two 3-STATE controls; one for two devices  
and one for the other four devices. Inputs are protected  
from damage due to static discharge by diode clamps to  
VCC and GND.  
Wide supply voltage range: 3.0V to 15V  
Guaranteed noise margin: 1.0V  
High noise immunity: 0.45 VCC (typ.)  
TTL compatible: Drive 1 TTL Load  
Applications  
Bus drivers: Typical propagation delay into 150 pF load  
is 40 ns  
Ordering Code:  
Order Number Package Number  
Package Description  
MM80C95N  
MM80C97M  
MM80C97N  
MM80C98N  
N16E  
M16A  
N16E  
N16E  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP  
MM80C95  
MM80C97  
Top View  
Top View  
MM80C98  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005907.prf  
www.fairchildsemi.com  

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