MM74HCT640

更新时间： 2024-01-24 15:39:49

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
4页	134K
描述
Inverting Octal TRI-STATE Transceiver

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MM74HCT640 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP,	针数：	20
Reach Compliance Code：	unknown	风险等级：	5.42
其他特性：	WITH COMMON OUTPUT ENABLE AND DIRECTION CONTROL	系列：	HCT
JESD-30 代码：	R-PDSO-G20	长度：	12.8 mm
负载电容（CL）：	50 pF	逻辑集成电路类型：	BUS TRANSCEIVER
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	INVERTED
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
传播延迟（tpd）：	29 ns	认证状态：	Not Qualified
座面最大高度：	2.65 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
宽度：	7.5 mm	Base Number Matches：	1

MM74HCT640 数据手册

February 1988

MM54HCT640/MM74HCT640

Inverting Octal TRI-STATE Transceiver

MM54HCT643/MM74HCT643

True-Inverting Octal TRI-STATE Transceiver

General Description

TheseTRI-STATEbi-directionaltransceiversutilizeadvanced

silicon-gate CMOS technology and are intended for two-way

asynchronous communication between data buses. They

have high drive current outputs which enable high speed

operation even when driving large bus capacitances. These

circuits possess the low power consumption of CMOS cir-

cuitry, yet have speeds comparable to low power Schottky

TTL circuits.

MM74HCT640 transfers inverted data from one bus to the

other. The MM54HCT643/MM74HCT643 transfers inverted

data from the A bus to the B bus and non-inverted data from

the B bus to the A bus.

MM54HCT/MM74HCT devices are intended to interface be-

tween TTL and NMOS components and standard CMOS

devices. These parts are also plug-in replacements for LS-

TTL devices and can be used to reduce power consumption

in existing designs.

All devices are TTL input compatible and can drive up to 15

LS-TTL loads, and all inputs are protected from damage due

Features

to static discharge by diodes to V

and ground.

TTL input compatible

Both the MM54HCT640/MM74HCT640 and the

MM54HCT643/ MM74HCT643 have one active low enable

input (G), and a direction control (DIR). When the DIR input

is high, data flows from the A inputs to the B outputs. When

DIR is low, data flows from B to A. The MM54HCT640/

Octal TRI-STATE outputs for mP bus applications:

6 mA, typical

High speed: 16 ns typical propagation delay

Low power: 80 mA maximum (74HCT)

Connection Diagram

Dual-In-Line Packages

TL/F/5370–1

TL/F/5370–2

Top View

Order Number MM54HCT643 or MM74HCT643

Top View

Order Number MM54HCT640 or MM74HCT640

Truth Table

Control

Inputs

Operation

DIR

640

643

B data to A bus B data to A bus

A data to B bus A data to B bus

Isolation

e e

high level, L low level, X irrelevant

TRI-STATEÉ is a registered trademark of National Semiconductor Corp.

1995 National Semiconductor Corporation

TL/F/5370

RRD-B30M105/Printed in U. S. A.

12 3 4

中文翻译

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与MM74HCT640相关器件

型号	品牌	获取价格	描述	数据表
MM74HCT640J	NSC	获取价格	Inverting Octal TRI-STATE Transceiver
MM74HCT640J/A+	TI	获取价格	IC,BUS TRANSCEIVER,SINGLE,8-BIT,HCT-CMOS,DIP,20PIN,CERAMIC
MM74HCT640N	NSC	获取价格	Inverting Octal TRI-STATE Transceiver
MM74HCT640N/A+	TI	获取价格	IC,BUS TRANSCEIVER,SINGLE,8-BIT,HCT-CMOS,DIP,20PIN,PLASTIC
MM74HCT640N/B+	TI	获取价格	IC,BUS TRANSCEIVER,SINGLE,8-BIT,HCT-CMOS,DIP,20PIN,PLASTIC
MM74HCT640WM	TI	获取价格	HCT SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20, PLASTIC, SO-20
MM74HCT640WM/A+	TI	获取价格	IC,BUS TRANSCEIVER,SINGLE,8-BIT,HCT-CMOS,SOP,20PIN,PLASTIC
MM74HCT640WMX	TI	获取价格	HCT SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20, PLASTIC, SO-20
MM74HCT643	NSC	获取价格	Inverting Octal TRI-STATE Transceiver
MM74HCT643J	NSC	获取价格	Inverting Octal TRI-STATE Transceiver

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