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MM74HCT573WM

更新时间： 2024-11-22 23:02:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器逻辑集成电路光电二极管驱动PC
页数 文件大小 规格书
8页 101K
描述
Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

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MM74HCT573WM 数据手册

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February 1990  
Revised May 1999  
MM74HCT573 • MM74HCT574  
Octal D-Type Latch • 3-STATE Octal D-Type Flip-Flop  
going transitions of the Clock (CK) input. When a high logic  
level is applied to the Output Control (OC) input, all outputs  
go to a high impedance state, regardless of what signals  
are present at the other inputs and the state of the storage  
elements.  
General Description  
The  
MM74HCT573  
octal  
D-type  
latches  
and  
MM74HCT574 octal D-type flip-flop advanced silicon-gate  
CMOS technology, which provides the inherent benefits of  
low power consumption and wide power supply range, but  
are LS-TTL input and output characteristic and pin-out  
compatible. The 3-STATE outputs are capable of driving 15  
LS-TTL loads. All inputs are protected from damage due to  
static discharge by internal diodes to VCC and ground.  
The MM74HCT devices are intended to interface between  
TTL and NMOS components and standard CMOS devices.  
These parts are also plug in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
When the MM74HCT573 Latch Enable input is HIGH, the  
Q outputs will follow the D inputs. When the Latch Enable  
goes LOW, data at the D inputs will be retained at the out-  
puts until Latch Enable returns HIGH again. When a high  
logic level is applied to the Output Control input, all outputs  
go to a high impedance state, regardless of what signals  
are present at the other inputs and the state of the storage  
elements.  
Features  
■ TTL input characteristic compatible  
■ Typical propagation delay: 18 ns  
■ Low input current: 1 µA maximum  
■ Low quiescent current: 80 µA maximum  
■ Compatible with bus-oriented systems  
■ Output drive capability: 15 LS-TTL loads  
The MM74HCT574 are positive edge triggered flip-flops.  
Data at the D inputs, meeting the setup and hold time  
requirements, are transferred to the Q outputs on positive  
Ordering Codes:  
Order Number  
MM74HCT573WM  
MM74HCT573SJ  
MM74HCT573MTC  
MM74HCT573N  
MM74HCT574WM  
MM74HCT574SJ  
MM74HCT574MTC  
MM74HCT574N  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
© 1999 Fairchild Semiconductor Corporation  
DS010627.prf  
www.fairchildsemi.com  
12345678

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MM74HCT573WM 替代型号

型号 品牌 替代类型 描述 数据表
MC74HCT573ADWG ONSEMI

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