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MM74HCT540SJX PDF预览

MM74HCT540SJX

更新时间： 2024-01-03 13:17:57
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管
页数 文件大小 规格书
7页 91K
描述
Bus Driver, HCT Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, 5.30 MM, EIAJ TYPE2, SOP-20

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MM74HCT540SJX 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP20,.3
针数：20Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.37
其他特性：WITH DUAL OUTPUT ENABLE控制类型：ENABLE LOW
系列：HCTJESD-30 代码：R-PDSO-G20
长度：12.6 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.006 A位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 VProp。Delay @ Nom-Sup：25 ns
传播延迟（tpd）：38 ns认证状态：Not Qualified
座面最大高度：2.1 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.3 mmBase Number Matches：1

MM74HCT540SJX 数据手册

 浏览型号MM74HCT540SJX的Datasheet PDF文件第2页浏览型号MM74HCT540SJX的Datasheet PDF文件第3页浏览型号MM74HCT540SJX的Datasheet PDF文件第4页浏览型号MM74HCT540SJX的Datasheet PDF文件第5页浏览型号MM74HCT540SJX的Datasheet PDF文件第6页浏览型号MM74HCT540SJX的Datasheet PDF文件第7页 
February 1984  
Revised February 1999  
MM74HCT540 • MM74HCT541  
Inverting Octal 3-STATE Buffer • Octal 3-STATE Buffer  
The MM74HCT540 is an inverting buffer and the  
MM74HCT541 is a non-inverting buffer. The 3-STATE con-  
General Description  
The MM74HCT540 and MM74HCT541 3-STATE buffers  
trol gate operates as a two-input NOR such that if either G1  
utilize advanced silicon-gate CMOS technology and are  
or G2 are HIGH, all eight outputs are in the high-imped-  
general purpose high speed inverting and non-inverting  
ance state.  
buffers. They possess high drive current outputs which  
In order to enhance PC board layout, the MM74HCT540  
enable high speed operation even when driving large bus  
and MM74HCT541 offers a pinout having inputs and out-  
capacitances. These circuits achieve speeds comparable  
puts on opposite sides of the package. All inputs are pro-  
to low power Schottky devices, while retaining the low  
tected from damage due to static discharge by diodes to  
power consumption of CMOS. Both devices are TTL input  
VCC and ground.  
compatible and have a fanout of 15 LS-TTL equivalent  
inputs.  
Features  
■ TTL input compatible  
MM74HCT devices are intended to interface between TTL  
and NMOS components and standard CMOS devices.  
These parts are also plug-in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
■ Typical propagation delay: 12 ns  
■ 3-STATE outputs for connection to system buses  
■ Low quiescent current: 80 µA  
■ Output current: 6 mA (min.)  
Ordering Code:  
Order Number  
MM74HCT540WM  
MM74HCT540SJ  
MM74HCT540MTC  
MM74HCT540N  
MM74HCT541WM  
MM74HCT541SJ  
MM74HCT541MTC  
MM74HCT541N  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Top View  
MM74HCT540  
Top View  
MM74HCT541  
© 1999 Fairchild Semiconductor Corporation  
DS006040.prf  
www.fairchildsemi.com  
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