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MM74HCT540SJ

更新时间： 2024-01-16 18:49:58
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
7页 95K
描述
Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer

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MM74HCT540SJ 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.72其他特性：WITH DUAL OUTPUT ENABLE
系列：HCTJESD-30 代码：R-PDSO-G20
JESD-609代码：e3长度：12.8015 mm
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE传播延迟（tpd）：38 ns
认证状态：Not Qualified座面最大高度：2.642 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：7.493 mm

MM74HCT540SJ 数据手册

 浏览型号MM74HCT540SJ的Datasheet PDF文件第2页浏览型号MM74HCT540SJ的Datasheet PDF文件第3页浏览型号MM74HCT540SJ的Datasheet PDF文件第4页浏览型号MM74HCT540SJ的Datasheet PDF文件第5页浏览型号MM74HCT540SJ的Datasheet PDF文件第6页浏览型号MM74HCT540SJ的Datasheet PDF文件第7页 
February 1984  
Revised February 1999  
MM74HCT540 • MM74HCT541  
Inverting Octal 3-STATE Buffer • Octal 3-STATE Buffer  
The MM74HCT540 is an inverting buffer and the  
MM74HCT541 is a non-inverting buffer. The 3-STATE con-  
General Description  
The MM74HCT540 and MM74HCT541 3-STATE buffers  
trol gate operates as a two-input NOR such that if either G1  
utilize advanced silicon-gate CMOS technology and are  
or G2 are HIGH, all eight outputs are in the high-imped-  
general purpose high speed inverting and non-inverting  
ance state.  
buffers. They possess high drive current outputs which  
In order to enhance PC board layout, the MM74HCT540  
enable high speed operation even when driving large bus  
and MM74HCT541 offers a pinout having inputs and out-  
capacitances. These circuits achieve speeds comparable  
puts on opposite sides of the package. All inputs are pro-  
to low power Schottky devices, while retaining the low  
tected from damage due to static discharge by diodes to  
power consumption of CMOS. Both devices are TTL input  
VCC and ground.  
compatible and have a fanout of 15 LS-TTL equivalent  
inputs.  
Features  
■ TTL input compatible  
MM74HCT devices are intended to interface between TTL  
and NMOS components and standard CMOS devices.  
These parts are also plug-in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
■ Typical propagation delay: 12 ns  
■ 3-STATE outputs for connection to system buses  
■ Low quiescent current: 80 µA  
■ Output current: 6 mA (min.)  
Ordering Code:  
Order Number  
MM74HCT540WM  
MM74HCT540SJ  
MM74HCT540MTC  
MM74HCT540N  
MM74HCT541WM  
MM74HCT541SJ  
MM74HCT541MTC  
MM74HCT541N  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Top View  
MM74HCT540  
Top View  
MM74HCT541  
© 1999 Fairchild Semiconductor Corporation  
DS006040.prf  
www.fairchildsemi.com  
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MM74HCT540SJ 替代型号

型号 品牌 替代类型 描述 数据表
MM74HCT540SJ FAIRCHILD

当前型号

 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer
CD74HCT540M TI

功能相似

 High Speed CMOS Logic Octal Buffer and Line Drivers, Three-State

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