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MM74HCT32SJX PDF预览

MM74HCT32SJX

更新时间: 2024-11-20 13:11:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
7页 83K
描述
Quad 2-Input OR Gate, 14LD,SOP,EIAJ TYPE II, 5.3MM WIDE, 2000/TAPE REEL

MM74HCT32SJX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOP
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.57
Is Samacsys:N系列:HCT
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.004 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:25 ns传播延迟(tpd):25 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

MM74HCT32SJX 数据手册

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October 1987  
Revised January 2005  
MM74HCT32  
Quad 2-Input OR Gate  
General Description  
Features  
The MM74HCT32 is a logic function fabricated by using  
advanced silicon-gate CMOS technology, which provides  
the inherent benefits of CMOS—low quiescent power and  
wide power supply range. This device is input and output  
characteristic and pin-out compatible with standard 74LS  
logic families. All inputs are protected from static discharge  
damage by internal diodes to VCC and ground.  
TTL, LS pin-out and threshold compatible  
Fast switching: tPLH, tPHL = 10 ns (typ)  
Low power: 10 µW at DC  
High fan-out, 10 LS-TTL loads  
MM74HCT devices are intended to interface between TTL  
and NMOS components and standard CMOS devices.  
These parts are also plug-in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
MM74HCT32M  
M14A.  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
MM74HCT32MX-NL  
MM74HCT32SJ  
MM74HCT32MTC  
MM74HCT32N  
Devices also available in Tape and Reel. Specify by appending suffix the letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Connection Diagram  
Logic Diagram  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
© 2005 Fairchild Semiconductor Corporation  
DS009396  
www.fairchildsemi.com  

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